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AArch64_ops.csv
1 | 1 | in_use | Opcode | prependage | appendage | Specific | variant | comments | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 31:30:29:28:27:26:25:24:23:22:21:20:19:18:17:16:15:14:13:12:11:10:9:8:7:6:5:4:3:2:1:0 | Binary | NAME | // Opcode BINARY OPCODE comments | // BINARY Opcode Opcode comments | ||||||
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2 | 2 | UNALLOCATED | 0 | 0 | /* UNALLOCATED */ | /* UNALLOCATED */ | |||||||||||||||||||||||||||||||||||||||||||||
3 | 3 | BAD | invalid operation | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:- | 0x00000000 | bad, | bad, /* 0x00000000 BAD invalid operation */ | 0x00000000, /* BAD bad invalid operation */ | |||||||||||
4 | 4 | Branch,exception generation and system Instruction | 1 | 0 | 1 | /* Branch,exception generation and system Instruction */ | /* Branch,exception generation and system Instruction */ | ||||||||||||||||||||||||||||||||||||||||||||
5 | 5 | Compare _ Branch (immediate) | - | 0 | 1 | 1 | 0 | 1 | 0 | - | imm19 | Rt | /* Compare _ Branch (immediate) */ | /* Compare _ Branch (immediate) */ | |||||||||||||||||||||||||||||||||||||
6 | 6 | CBZ | w | W | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0x34000000 | cbzw, | cbzw, /* 0x34000000 CBZ */ | 0x34000000, /* CBZ cbzw */ | ||||||||||||||||||||||||||||||||
7 | 7 | CBNZ | w | W | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0x35000000 | cbnzw, | cbnzw, /* 0x35000000 CBNZ */ | 0x35000000, /* CBNZ cbnzw */ | ||||||||||||||||||||||||||||||||
8 | 8 | CBZ | x | X | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0xB4000000 | cbzx, | cbzx, /* 0xB4000000 CBZ */ | 0xB4000000, /* CBZ cbzx */ | ||||||||||||||||||||||||||||||||
9 | 9 | CBNZ | x | X | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0xB5000000 | cbnzx, | cbnzx, /* 0xB5000000 CBNZ */ | 0xB5000000, /* CBNZ cbnzx */ | ||||||||||||||||||||||||||||||||
10 | 10 | Test bit & branch (immediate) | b5 | 0 | 1 | 1 | 0 | 1 | 1 | - | b40 | imm14 | Rt | /* Test bit & branch (immediate) */ | /* Test bit & branch (immediate) */ | ||||||||||||||||||||||||||||||||||||
11 | 11 | TBZ | b5 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | b40 | imm14 | Rt | b5:-:-:-:-:-:-:-:b40:::::imm14::::::::::::::Rt:::: | 0x36000000 | tbz, | tbz, /* 0x36000000 TBZ */ | 0x36000000, /* TBZ tbz */ | |||||||||||||||||||||||||||||||||
12 | 12 | TBNZ | b5 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | b40 | imm14 | Rt | b5:-:-:-:-:-:-:-:b40:::::imm14::::::::::::::Rt:::: | 0x37000000 | tbnz, | tbnz, /* 0x37000000 TBNZ */ | 0x37000000, /* TBNZ tbnz */ | |||||||||||||||||||||||||||||||||
13 | 13 | Conditional branch (immediate) | 0 | 1 | 0 | 1 | 0 | 1 | 0 | - | imm19 | - | cond | /* Conditional branch (immediate) */ | /* Conditional branch (immediate) */ | ||||||||||||||||||||||||||||||||||||
14 | 14 | B_cond | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | imm19 | 0 | cond | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::-:cond::: | 0x54000000 | b_cond, | b_cond, /* 0x54000000 B_cond */ | 0x54000000, /* B_cond b_cond */ | |||||||||||||||||||||||||||||||||
15 | 15 | Exception generation | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | - | - | - | imm16 | - | - | - | - | - | /* Exception generation */ | /* Exception generation */ | ||||||||||||||||||||||||||||||
16 | 16 | // | SVC | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | imm16 | 0 | 0 | 0 | 0 | 1 | -:-:-:-:-:-:-:-:-:-:-:imm16::::::::::::::::-:-:-:-:- | 0xD4000001 | svc, | // svc, /* 0xD4000001 SVC */ | // 0xD4000001, /* SVC svc */ | ||||||||||||||||||||||||||
17 | 17 | // | HVC | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | imm16 | 0 | 0 | 0 | 1 | 0 | -:-:-:-:-:-:-:-:-:-:-:imm16::::::::::::::::-:-:-:-:- | 0xD4000002 | hvc, | // hvc, /* 0xD4000002 HVC */ | // 0xD4000002, /* HVC hvc */ | ||||||||||||||||||||||||||
18 | 18 | // | SMC | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | imm16 | 0 | 0 | 0 | 1 | 1 | -:-:-:-:-:-:-:-:-:-:-:imm16::::::::::::::::-:-:-:-:- | 0xD4000003 | smc, | // smc, /* 0xD4000003 SMC */ | // 0xD4000003, /* SMC smc */ | ||||||||||||||||||||||||||
19 | 19 | BRK | arm64 | arm64 | AArch64 Specific BRK | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | imm16 | 0 | 0 | 0 | 0 | 0 | -:-:-:-:-:-:-:-:-:-:-:imm16::::::::::::::::-:-:-:-:- | 0xD4200000 | brkarm64, | brkarm64, /* 0xD4200000 BRK AArch64 Specific BRK */ | 0xD4200000, /* BRK brkarm64 AArch64 Specific BRK */ | ||||||||||||||||||||||||
20 | 20 | // | HLT | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | imm16 | 0 | 0 | 0 | 0 | 0 | -:-:-:-:-:-:-:-:-:-:-:imm16::::::::::::::::-:-:-:-:- | 0xD4400000 | hlt, | // hlt, /* 0xD4400000 HLT */ | // 0xD4400000, /* HLT hlt */ | ||||||||||||||||||||||||||
21 | 21 | // | DCPS1 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | imm16 | 0 | 0 | 0 | 0 | 1 | -:-:-:-:-:-:-:-:-:-:-:imm16::::::::::::::::-:-:-:-:- | 0xD4A00001 | dcps1, | // dcps1, /* 0xD4A00001 DCPS1 */ | // 0xD4A00001, /* DCPS1 dcps1 */ | ||||||||||||||||||||||||||
22 | 22 | // | DCPS2 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | imm16 | 0 | 0 | 0 | 1 | 0 | -:-:-:-:-:-:-:-:-:-:-:imm16::::::::::::::::-:-:-:-:- | 0xD4A00002 | dcps2, | // dcps2, /* 0xD4A00002 DCPS2 */ | // 0xD4A00002, /* DCPS2 dcps2 */ | ||||||||||||||||||||||||||
23 | 23 | // | DCPS3 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | imm16 | 0 | 0 | 0 | 1 | 1 | -:-:-:-:-:-:-:-:-:-:-:imm16::::::::::::::::-:-:-:-:- | 0xD4A00003 | dcps3, | // dcps3, /* 0xD4A00003 DCPS3 */ | // 0xD4A00003, /* DCPS3 dcps3 */ | ||||||||||||||||||||||||||
24 | 24 | // | System | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | - | - | - | op1 | CRn | CRm | op2 | Rt | /* System */ | /* System */ | ||||||||||||||||||||||||||||
25 | 25 | // | MSR | imm | imm | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | op1 | 0 | 1 | 0 | 0 | CR_m | op2 | 1 | 1 | 1 | 1 | 1 | -:-:-:-:-:-:-:-:-:-:-:-:-:op1:::-:-:-:-:CR_m::::op2:::-:-:-:-:- | 0xD500401F | msrimm, | // msrimm, /* 0xD500401F MSR */ | // 0xD500401F, /* MSR msrimm */ | ||||||||||||||||
26 | 26 | // | HINT | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | CR_m | op2 | 1 | 1 | 1 | 1 | 1 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:CR_m::::op2:::-:-:-:-:- | 0xD503201F | hint, | // hint, /* 0xD503201F HINT */ | // 0xD503201F, /* HINT hint */ | ||||||||||||||||
27 | 27 | // | CLREX | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CR_m | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:CR_m::::-:-:-:-:-:-:-:- | 0xD503305F | clrex, | // clrex, /* 0xD503305F CLREX */ | // 0xD503305F, /* CLREX clrex */ | ||||||||||||||
28 | 28 | // | DSB | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CR_m | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:CR_m::::-:-:-:-:-:-:-:- | 0xD503309F | dsb, | // dsb, /* 0xD503309F DSB */ | // 0xD503309F, /* DSB dsb */ | ||||||||||||||
29 | 29 | // | DMB | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CR_m | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:CR_m::::-:-:-:-:-:-:-:- | 0xD50330BF | dmb, | // dmb, /* 0xD50330BF DMB */ | // 0xD50330BF, /* DMB dmb */ | ||||||||||||||
30 | 30 | // | ISB | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | CR_m | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:CR_m::::-:-:-:-:-:-:-:- | 0xD50330DF | isb, | // isb, /* 0xD50330DF ISB */ | // 0xD50330DF, /* ISB isb */ | ||||||||||||||
31 | 31 | // | SYS | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | op1 | CR_n | CR_m | op2 | Rt | -:-:-:-:-:-:-:-:-:-:-:-:-:op1:::CR_n::::CR_m::::op2:::Rt:::: | 0xD5080000 | sys, | // sys, /* 0xD5080000 SYS */ | // 0xD5080000, /* SYS sys */ | |||||||||||||||||||||||||
32 | 32 | // | MSR | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | - | op1 | CR_n | CR_m | op2 | Rt | -:-:-:-:-:-:-:-:-:-:-:-:-:op1:::CR_n::::CR_m::::op2:::Rt:::: | 0xD5100000 | msr, | // msr, /* 0xD5100000 MSR */ | // 0xD5100000, /* MSR msr */ | |||||||||||||||||||||||||
33 | 33 | // | SYSL | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | op1 | CR_n | CR_m | op2 | Rt | -:-:-:-:-:-:-:-:-:-:-:-:-:op1:::CR_n::::CR_m::::op2:::Rt:::: | 0xD5280000 | sysl, | // sysl, /* 0xD5280000 SYSL */ | // 0xD5280000, /* SYSL sysl */ | |||||||||||||||||||||||||
34 | 34 | // | MRS | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | - | op1 | CR_n | CR_m | op2 | Rt | -:-:-:-:-:-:-:-:-:-:-:-:-:op1:::CR_n::::CR_m::::op2:::Rt:::: | 0xD5300000 | mrs, | // mrs, /* 0xD5300000 MRS */ | // 0xD5300000, /* MRS mrs */ | |||||||||||||||||||||||||
35 | 35 | Unconditional branch (register) | 1 | 1 | 0 | 1 | 0 | 1 | 1 | opc | op2 | op3 | Rn | op4 | /* Unconditional branch (register) */ | /* Unconditional branch (register) */ | |||||||||||||||||||||||||||||||||||
36 | 36 | BR | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rn | 0 | 0 | 0 | 0 | 0 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:Rn:::::-:-:-:-:- | 0xD61F0000 | br, | br, /* 0xD61F0000 BR */ | 0xD61F0000, /* BR br */ | ||||||||||||||||
37 | 37 | BLR | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rn | 0 | 0 | 0 | 0 | 0 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:Rn:::::-:-:-:-:- | 0xD63F0000 | blr, | blr, /* 0xD63F0000 BLR */ | 0xD63F0000, /* BLR blr */ | ||||||||||||||||
38 | 38 | RET | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rn | 0 | 0 | 0 | 0 | 0 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:Rn:::::-:-:-:-:- | 0xD65F0000 | ret, | ret, /* 0xD65F0000 RET */ | 0xD65F0000, /* RET ret */ | ||||||||||||||||
39 | 39 | // | ERET | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:- | 0xD69F03E0 | eret, | // eret, /* 0xD69F03E0 ERET */ | // 0xD69F03E0, /* ERET eret */ | |||||||||||
40 | 40 | // | DRPS | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | -:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:-:- | 0xD6BF03E0 | drps, | // drps, /* 0xD6BF03E0 DRPS */ | // 0xD6BF03E0, /* DRPS drps */ | |||||||||||
41 | 41 | // | Unconditional branch (immediate) | - | 0 | 0 | 1 | 0 | 1 | imm26 | /* Unconditional branch (immediate) */ | /* Unconditional branch (immediate) */ | |||||||||||||||||||||||||||||||||||||||
42 | 42 | B | 0 | 0 | 0 | 1 | 0 | 1 | imm26 | -:-:-:-:-:-:imm26::::::::::::::::::::::::: | 0x14000000 | b, | b, /* 0x14000000 B */ | 0x14000000, /* B b */ | |||||||||||||||||||||||||||||||||||||
43 | 43 | BL | 1 | 0 | 0 | 1 | 0 | 1 | imm26 | -:-:-:-:-:-:imm26::::::::::::::::::::::::: | 0x94000000 | bl, | bl, /* 0x94000000 BL */ | 0x94000000, /* BL bl */ | |||||||||||||||||||||||||||||||||||||
44 | 44 | Loads and stores | 1 | 0 | /* Loads and stores */ | /* Loads and stores */ | |||||||||||||||||||||||||||||||||||||||||||||
45 | 45 | Load/store exclusive | - | - | 0 | 0 | 1 | 0 | 0 | 0 | - | - | - | Rs | - | Rt2 | Rn | Rt | /* Load/store exclusive */ | /* Load/store exclusive */ | |||||||||||||||||||||||||||||||
46 | 46 | STXRB | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x08000000 | stxrb, | stxrb, /* 0x08000000 STXRB */ | 0x08000000, /* STXRB stxrb */ | ||||||||||||||||||||||||||||
47 | 47 | STLXRB | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x08008000 | stlxrb, | stlxrb, /* 0x08008000 STLXRB */ | 0x08008000, /* STLXRB stlxrb */ | ||||||||||||||||||||||||||||
48 | 48 | LDXRB | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x08400000 | ldxrb, | ldxrb, /* 0x08400000 LDXRB */ | 0x08400000, /* LDXRB ldxrb */ | ||||||||||||||||||||||||||||
49 | 49 | LDAXRB | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x08408000 | ldaxrb, | ldaxrb, /* 0x08408000 LDAXRB */ | 0x08408000, /* LDAXRB ldaxrb */ | ||||||||||||||||||||||||||||
50 | 50 | STLRB | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x08808000 | stlrb, | stlrb, /* 0x08808000 STLRB */ | 0x08808000, /* STLRB stlrb */ | ||||||||||||||||||||||||||||
51 | 51 | LDARB | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x08C08000 | ldarb, | ldarb, /* 0x08C08000 LDARB */ | 0x08C08000, /* LDARB ldarb */ | ||||||||||||||||||||||||||||
52 | 52 | STXRH | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x48000000 | stxrh, | stxrh, /* 0x48000000 STXRH */ | 0x48000000, /* STXRH stxrh */ | ||||||||||||||||||||||||||||
53 | 53 | STLXRH | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x48008000 | stlxrh, | stlxrh, /* 0x48008000 STLXRH */ | 0x48008000, /* STLXRH stlxrh */ | ||||||||||||||||||||||||||||
54 | 54 | LDXRH | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x48400000 | ldxrh, | ldxrh, /* 0x48400000 LDXRH */ | 0x48400000, /* LDXRH ldxrh */ | ||||||||||||||||||||||||||||
55 | 55 | LDAXRH | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x48408000 | ldaxrh, | ldaxrh, /* 0x48408000 LDAXRH */ | 0x48408000, /* LDAXRH ldaxrh */ | ||||||||||||||||||||||||||||
56 | 56 | STLRH | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x48808000 | stlrh, | stlrh, /* 0x48808000 STLRH */ | 0x48808000, /* STLRH stlrh */ | ||||||||||||||||||||||||||||
57 | 57 | LDARH | 0 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x48C08000 | ldarh, | ldarh, /* 0x48C08000 LDARH */ | 0x48C08000, /* LDARH ldarh */ | ||||||||||||||||||||||||||||
58 | 58 | STXR | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88000000 | stxrw, | stxrw, /* 0x88000000 STXR */ | 0x88000000, /* STXR stxrw */ | ||||||||||||||||||||||||||
59 | 59 | STLXR | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88008000 | stlxrw, | stlxrw, /* 0x88008000 STLXR */ | 0x88008000, /* STLXR stlxrw */ | ||||||||||||||||||||||||||
60 | 60 | STXP | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88200000 | stxpw, | stxpw, /* 0x88200000 STXP */ | 0x88200000, /* STXP stxpw */ | ||||||||||||||||||||||||||
61 | 61 | STLXP | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88208000 | stlxpw, | stlxpw, /* 0x88208000 STLXP */ | 0x88208000, /* STLXP stlxpw */ | ||||||||||||||||||||||||||
62 | 62 | LDXR | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88400000 | ldxrw, | ldxrw, /* 0x88400000 LDXR */ | 0x88400000, /* LDXR ldxrw */ | ||||||||||||||||||||||||||
63 | 63 | LDAXR | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88408000 | ldaxrw, | ldaxrw, /* 0x88408000 LDAXR */ | 0x88408000, /* LDAXR ldaxrw */ | ||||||||||||||||||||||||||
64 | 64 | LDXP | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88600000 | ldxpw, | ldxpw, /* 0x88600000 LDXP */ | 0x88600000, /* LDXP ldxpw */ | ||||||||||||||||||||||||||
65 | 65 | LDAXP | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88608000 | ldaxpw, | ldaxpw, /* 0x88608000 LDAXP */ | 0x88608000, /* LDAXP ldaxpw */ | ||||||||||||||||||||||||||
66 | 66 | STLR | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88808000 | stlrw, | stlrw, /* 0x88808000 STLR */ | 0x88808000, /* STLR stlrw */ | ||||||||||||||||||||||||||
67 | 67 | LDAR | w | W | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0x88C08000 | ldarw, | ldarw, /* 0x88C08000 LDAR */ | 0x88C08000, /* LDAR ldarw */ | ||||||||||||||||||||||||||
68 | 68 | STXR | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8000000 | stxrx, | stxrx, /* 0xC8000000 STXR */ | 0xC8000000, /* STXR stxrx */ | ||||||||||||||||||||||||||
69 | 69 | STLXR | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8008000 | stlxrx, | stlxrx, /* 0xC8008000 STLXR */ | 0xC8008000, /* STLXR stlxrx */ | ||||||||||||||||||||||||||
70 | 70 | STXP | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8200000 | stxpx, | stxpx, /* 0xC8200000 STXP */ | 0xC8200000, /* STXP stxpx */ | ||||||||||||||||||||||||||
71 | 71 | STLXP | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8208000 | stlxpx, | stlxpx, /* 0xC8208000 STLXP */ | 0xC8208000, /* STLXP stlxpx */ | ||||||||||||||||||||||||||
72 | 72 | LDXR | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8400000 | ldxrx, | ldxrx, /* 0xC8400000 LDXR */ | 0xC8400000, /* LDXR ldxrx */ | ||||||||||||||||||||||||||
73 | 73 | LDAXR | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8408000 | ldaxrx, | ldaxrx, /* 0xC8408000 LDAXR */ | 0xC8408000, /* LDAXR ldaxrx */ | ||||||||||||||||||||||||||
74 | 74 | LDXP | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | Rs | 0 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8600000 | ldxpx, | ldxpx, /* 0xC8600000 LDXP */ | 0xC8600000, /* LDXP ldxpx */ | ||||||||||||||||||||||||||
75 | 75 | LDAXP | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8608000 | ldaxpx, | ldaxpx, /* 0xC8608000 LDAXP */ | 0xC8608000, /* LDAXP ldaxpx */ | ||||||||||||||||||||||||||
76 | 76 | STLR | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8808000 | stlrx, | stlrx, /* 0xC8808000 STLR */ | 0xC8808000, /* STLR stlrx */ | ||||||||||||||||||||||||||
77 | 77 | LDAR | x | X | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | Rs | 1 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:Rs:::::-:Rt2:::::Rn:::::Rt:::: | 0xC8C08000 | ldarx, | ldarx, /* 0xC8C08000 LDAR */ | 0xC8C08000, /* LDAR ldarx */ | ||||||||||||||||||||||||||
78 | 78 | Load register (literal) | - | - | 0 | 1 | 1 | - | 0 | 0 | imm19 | Rt | /* Load register (literal) */ | /* Load register (literal) */ | |||||||||||||||||||||||||||||||||||||
79 | 79 | LDR | w | W | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0x18000000 | ldrw, | ldrw, /* 0x18000000 LDR */ | 0x18000000, /* LDR ldrw */ | ||||||||||||||||||||||||||||||||
80 | 80 | LDR | v | s | S | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0x1C000000 | vldrs, | vldrs, /* 0x1C000000 LDR */ | 0x1C000000, /* LDR vldrs */ | |||||||||||||||||||||||||||||||
81 | 81 | LDR | x | X | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0x58000000 | ldrx, | ldrx, /* 0x58000000 LDR */ | 0x58000000, /* LDR ldrx */ | ||||||||||||||||||||||||||||||||
82 | 82 | LDR | v | d | D | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0x5C000000 | vldrd, | vldrd, /* 0x5C000000 LDR */ | 0x5C000000, /* LDR vldrd */ | |||||||||||||||||||||||||||||||
83 | 83 | LDRSW | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0x98000000 | ldrsw, | ldrsw, /* 0x98000000 LDRSW */ | 0x98000000, /* LDRSW ldrsw */ | ||||||||||||||||||||||||||||||||||
84 | 84 | LDR | v | q | Q | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0x9C000000 | vldrq, | vldrq, /* 0x9C000000 LDR */ | 0x9C000000, /* LDR vldrq */ | |||||||||||||||||||||||||||||||
85 | 85 | PRFM | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | imm19 | Rt | -:-:-:-:-:-:-:-:imm19:::::::::::::::::::Rt:::: | 0xD8000000 | prfm, | prfm, /* 0xD8000000 PRFM */ | 0xD8000000, /* PRFM prfm */ | ||||||||||||||||||||||||||||||||||
86 | 86 | Load/store no-allocate pair (offset) | - | - | 1 | 0 | 1 | - | 0 | 0 | 0 | - | imm7 | Rt2 | Rn | Rt | /* Load/store no-allocate pair (offset) */ | /* Load/store no-allocate pair (offset) */ | |||||||||||||||||||||||||||||||||
87 | 87 | STNP | w | W | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x28000000 | stnpw, | stnpw, /* 0x28000000 STNP */ | 0x28000000, /* STNP stnpw */ | ||||||||||||||||||||||||||||
88 | 88 | LDNP | w | W | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x28400000 | ldnpw, | ldnpw, /* 0x28400000 LDNP */ | 0x28400000, /* LDNP ldnpw */ | ||||||||||||||||||||||||||||
89 | 89 | STNP | v | s | S | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x2C000000 | vstnps, | vstnps, /* 0x2C000000 STNP */ | 0x2C000000, /* STNP vstnps */ | |||||||||||||||||||||||||||
90 | 90 | LDNP | v | s | S | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x2C400000 | vldnps, | vldnps, /* 0x2C400000 LDNP */ | 0x2C400000, /* LDNP vldnps */ | |||||||||||||||||||||||||||
91 | 91 | STNP | v | d | D | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x6C000000 | vstnpd, | vstnpd, /* 0x6C000000 STNP */ | 0x6C000000, /* STNP vstnpd */ | |||||||||||||||||||||||||||
92 | 92 | LDNP | v | d | D | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x6C400000 | vldnpd, | vldnpd, /* 0x6C400000 LDNP */ | 0x6C400000, /* LDNP vldnpd */ | |||||||||||||||||||||||||||
93 | 93 | STNP | x | X | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xA8000000 | stnpx, | stnpx, /* 0xA8000000 STNP */ | 0xA8000000, /* STNP stnpx */ | ||||||||||||||||||||||||||||
94 | 94 | LDNP | x | X | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xA8400000 | ldnpx, | ldnpx, /* 0xA8400000 LDNP */ | 0xA8400000, /* LDNP ldnpx */ | ||||||||||||||||||||||||||||
95 | 95 | STNP | v | q | Q | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xAC000000 | vstnpq, | vstnpq, /* 0xAC000000 STNP */ | 0xAC000000, /* STNP vstnpq */ | |||||||||||||||||||||||||||
96 | 96 | LDNP | v | q | Q | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xAC400000 | vldnpq, | vldnpq, /* 0xAC400000 LDNP */ | 0xAC400000, /* LDNP vldnpq */ | |||||||||||||||||||||||||||
97 | 97 | Load/store register pair (post-indexed) | opc | 1 | 0 | 1 | V | 0 | 0 | 1 | L | imm7 | Rt2 | Rn | Rt | /* Load/store register pair (post-indexed) */ | /* Load/store register pair (post-indexed) */ | ||||||||||||||||||||||||||||||||||
98 | 98 | STP | postw | post | W | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x28800000 | stppostw, | stppostw, /* 0x28800000 STP */ | 0x28800000, /* STP stppostw */ | |||||||||||||||||||||||||||
99 | 99 | LDP | postw | post | W | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x28C00000 | ldppostw, | ldppostw, /* 0x28C00000 LDP */ | 0x28C00000, /* LDP ldppostw */ | |||||||||||||||||||||||||||
100 | 100 | STP | v | posts | post | S | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x2C800000 | vstpposts, | vstpposts, /* 0x2C800000 STP */ | 0x2C800000, /* STP vstpposts */ | ||||||||||||||||||||||||||
101 | 101 | LDP | v | posts | post | S | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x2CC00000 | vldpposts, | vldpposts, /* 0x2CC00000 LDP */ | 0x2CC00000, /* LDP vldpposts */ | ||||||||||||||||||||||||||
102 | 102 | LDPSW | post | post | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x68C00000 | ldpswpost, | ldpswpost, /* 0x68C00000 LDPSW */ | 0x68C00000, /* LDPSW ldpswpost */ | ||||||||||||||||||||||||||||
103 | 103 | STP | v | postd | post | D | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x6C800000 | vstppostd, | vstppostd, /* 0x6C800000 STP */ | 0x6C800000, /* STP vstppostd */ | ||||||||||||||||||||||||||
104 | 104 | LDP | v | postd | post | D | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x6CC00000 | vldppostd, | vldppostd, /* 0x6CC00000 LDP */ | 0x6CC00000, /* LDP vldppostd */ | ||||||||||||||||||||||||||
105 | 105 | STP | postx | post | X | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xA8800000 | stppostx, | stppostx, /* 0xA8800000 STP */ | 0xA8800000, /* STP stppostx */ | |||||||||||||||||||||||||||
106 | 106 | LDP | postx | post | X | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xA8C00000 | ldppostx, | ldppostx, /* 0xA8C00000 LDP */ | 0xA8C00000, /* LDP ldppostx */ | |||||||||||||||||||||||||||
107 | 107 | STP | v | postq | post | Q | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xAC800000 | vstppostq, | vstppostq, /* 0xAC800000 STP */ | 0xAC800000, /* STP vstppostq */ | ||||||||||||||||||||||||||
108 | 108 | LDP | v | postq | post | Q | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xACC00000 | vldppostq, | vldppostq, /* 0xACC00000 LDP */ | 0xACC00000, /* LDP vldppostq */ | ||||||||||||||||||||||||||
109 | 109 | Load/store register pair (offset) | opc | 1 | 0 | 1 | V | 0 | 1 | 0 | L | imm7 | Rt2 | Rn | Rt | /* Load/store register pair (offset) */ | /* Load/store register pair (offset) */ | ||||||||||||||||||||||||||||||||||
110 | 110 | STP | offw | off | W | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x29000000 | stpoffw, | stpoffw, /* 0x29000000 STP */ | 0x29000000, /* STP stpoffw */ | |||||||||||||||||||||||||||
111 | 111 | LDP | offw | off | W | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x29400000 | ldpoffw, | ldpoffw, /* 0x29400000 LDP */ | 0x29400000, /* LDP ldpoffw */ | |||||||||||||||||||||||||||
112 | 112 | STP | v | offs | off | S | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x2D000000 | vstpoffs, | vstpoffs, /* 0x2D000000 STP */ | 0x2D000000, /* STP vstpoffs */ | ||||||||||||||||||||||||||
113 | 113 | LDP | v | offs | off | S | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x2D400000 | vldpoffs, | vldpoffs, /* 0x2D400000 LDP */ | 0x2D400000, /* LDP vldpoffs */ | ||||||||||||||||||||||||||
114 | 114 | LDPSW | off | off | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x69400000 | ldpswoff, | ldpswoff, /* 0x69400000 LDPSW */ | 0x69400000, /* LDPSW ldpswoff */ | ||||||||||||||||||||||||||||
115 | 115 | STP | v | offd | off | D | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x6D000000 | vstpoffd, | vstpoffd, /* 0x6D000000 STP */ | 0x6D000000, /* STP vstpoffd */ | ||||||||||||||||||||||||||
116 | 116 | LDP | v | offd | off | D | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x6D400000 | vldpoffd, | vldpoffd, /* 0x6D400000 LDP */ | 0x6D400000, /* LDP vldpoffd */ | ||||||||||||||||||||||||||
117 | 117 | STP | offx | off | X | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xA9000000 | stpoffx, | stpoffx, /* 0xA9000000 STP */ | 0xA9000000, /* STP stpoffx */ | |||||||||||||||||||||||||||
118 | 118 | LDP | offx | off | X | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xA9400000 | ldpoffx, | ldpoffx, /* 0xA9400000 LDP */ | 0xA9400000, /* LDP ldpoffx */ | |||||||||||||||||||||||||||
119 | 119 | STP | v | offq | off | Q | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xAD000000 | vstpoffq, | vstpoffq, /* 0xAD000000 STP */ | 0xAD000000, /* STP vstpoffq */ | ||||||||||||||||||||||||||
120 | 120 | LDP | v | offq | off | Q | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xAD400000 | vldpoffq, | vldpoffq, /* 0xAD400000 LDP */ | 0xAD400000, /* LDP vldpoffq */ | ||||||||||||||||||||||||||
121 | 121 | Load/store register pair (pre-indexed) | opc | 1 | 0 | 1 | V | 0 | 1 | 1 | L | imm7 | Rt2 | Rn | Rt | /* Load/store register pair (pre-indexed) */ | /* Load/store register pair (pre-indexed) */ | ||||||||||||||||||||||||||||||||||
122 | 122 | STP | prew | pre | W | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x29800000 | stpprew, | stpprew, /* 0x29800000 STP */ | 0x29800000, /* STP stpprew */ | |||||||||||||||||||||||||||
123 | 123 | LDP | prew | pre | W | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x29C00000 | ldpprew, | ldpprew, /* 0x29C00000 LDP */ | 0x29C00000, /* LDP ldpprew */ | |||||||||||||||||||||||||||
124 | 124 | STP | v | pres | pre | S | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x2D800000 | vstppres, | vstppres, /* 0x2D800000 STP */ | 0x2D800000, /* STP vstppres */ | ||||||||||||||||||||||||||
125 | 125 | LDP | v | pres | pre | S | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x2DC00000 | vldppres, | vldppres, /* 0x2DC00000 LDP */ | 0x2DC00000, /* LDP vldppres */ | ||||||||||||||||||||||||||
126 | 126 | LDPSW | pre | pre | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x69C00000 | ldpswpre, | ldpswpre, /* 0x69C00000 LDPSW */ | 0x69C00000, /* LDPSW ldpswpre */ | ||||||||||||||||||||||||||||
127 | 127 | STP | v | pred | pre | D | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x6D800000 | vstppred, | vstppred, /* 0x6D800000 STP */ | 0x6D800000, /* STP vstppred */ | ||||||||||||||||||||||||||
128 | 128 | LDP | v | pred | pre | D | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0x6DC00000 | vldppred, | vldppred, /* 0x6DC00000 LDP */ | 0x6DC00000, /* LDP vldppred */ | ||||||||||||||||||||||||||
129 | 129 | STP | prex | pre | X | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xA9800000 | stpprex, | stpprex, /* 0xA9800000 STP */ | 0xA9800000, /* STP stpprex */ | |||||||||||||||||||||||||||
130 | 130 | LDP | prex | pre | X | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xA9C00000 | ldpprex, | ldpprex, /* 0xA9C00000 LDP */ | 0xA9C00000, /* LDP ldpprex */ | |||||||||||||||||||||||||||
131 | 131 | STP | v | preq | pre | Q | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xAD800000 | vstppreq, | vstppreq, /* 0xAD800000 STP */ | 0xAD800000, /* STP vstppreq */ | ||||||||||||||||||||||||||
132 | 132 | LDP | v | preq | pre | Q | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | imm7 | Rt2 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:imm7:::::::Rt2:::::Rn:::::Rt:::: | 0xADC00000 | vldppreq, | vldppreq, /* 0xADC00000 LDP */ | 0xADC00000, /* LDP vldppreq */ | ||||||||||||||||||||||||||
133 | 133 | Load/store register (unscaled immediate) | size | 1 | 1 | 1 | V | 0 | 0 | opc | 0 | imm9 | 0 | 0 | Rn | Rt | /* Load/store register (unscaled immediate) */ | /* Load/store register (unscaled immediate) */ | |||||||||||||||||||||||||||||||||
134 | 134 | STURB | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38000000 | sturb, | sturb, /* 0x38000000 STURB */ | 0x38000000, /* STURB sturb */ | ||||||||||||||||||||||||||||
135 | 135 | LDURB | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38400000 | ldurb, | ldurb, /* 0x38400000 LDURB */ | 0x38400000, /* LDURB ldurb */ | ||||||||||||||||||||||||||||
136 | 136 | LDURSB | x | X | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38800000 | ldursbx, | ldursbx, /* 0x38800000 LDURSB */ | 0x38800000, /* LDURSB ldursbx */ | ||||||||||||||||||||||||||
137 | 137 | LDURSB | w | W | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38C00000 | ldursbw, | ldursbw, /* 0x38C00000 LDURSB */ | 0x38C00000, /* LDURSB ldursbw */ | ||||||||||||||||||||||||||
138 | 138 | STUR | v | b | B | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3C000000 | vsturb, | vsturb, /* 0x3C000000 STUR */ | 0x3C000000, /* STUR vsturb */ | |||||||||||||||||||||||||
139 | 139 | LDUR | v | b | B | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3C400000 | vldurb, | vldurb, /* 0x3C400000 LDUR */ | 0x3C400000, /* LDUR vldurb */ | |||||||||||||||||||||||||
140 | 140 | STUR | v | q | Q | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3C800000 | vsturq, | vsturq, /* 0x3C800000 STUR */ | 0x3C800000, /* STUR vsturq */ | |||||||||||||||||||||||||
141 | 141 | LDUR | v | q | Q | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3CC00000 | vldurq, | vldurq, /* 0x3CC00000 LDUR */ | 0x3CC00000, /* LDUR vldurq */ | |||||||||||||||||||||||||
142 | 142 | STURH | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78000000 | sturh, | sturh, /* 0x78000000 STURH */ | 0x78000000, /* STURH sturh */ | ||||||||||||||||||||||||||||
143 | 143 | LDURH | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78400000 | ldurh, | ldurh, /* 0x78400000 LDURH */ | 0x78400000, /* LDURH ldurh */ | ||||||||||||||||||||||||||||
144 | 144 | LDURSH | x | X | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78800000 | ldurshx, | ldurshx, /* 0x78800000 LDURSH */ | 0x78800000, /* LDURSH ldurshx */ | ||||||||||||||||||||||||||
145 | 145 | LDURSH | w | W | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78C00000 | ldurshw, | ldurshw, /* 0x78C00000 LDURSH */ | 0x78C00000, /* LDURSH ldurshw */ | ||||||||||||||||||||||||||
146 | 146 | STUR | v | h | H | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x7C000000 | vsturh, | vsturh, /* 0x7C000000 STUR */ | 0x7C000000, /* STUR vsturh */ | |||||||||||||||||||||||||
147 | 147 | LDUR | v | h | H | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x7C400000 | vldurh, | vldurh, /* 0x7C400000 LDUR */ | 0x7C400000, /* LDUR vldurh */ | |||||||||||||||||||||||||
148 | 148 | STUR | w | W | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xB8000000 | sturw, | sturw, /* 0xB8000000 STUR */ | 0xB8000000, /* STUR sturw */ | ||||||||||||||||||||||||||
149 | 149 | LDUR | w | W | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xB8400000 | ldurw, | ldurw, /* 0xB8400000 LDUR */ | 0xB8400000, /* LDUR ldurw */ | ||||||||||||||||||||||||||
150 | 150 | LDURSW | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xB8800000 | ldursw, | ldursw, /* 0xB8800000 LDURSW */ | 0xB8800000, /* LDURSW ldursw */ | ||||||||||||||||||||||||||||
151 | 151 | STUR | v | s | S | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xBC000000 | vsturs, | vsturs, /* 0xBC000000 STUR */ | 0xBC000000, /* STUR vsturs */ | |||||||||||||||||||||||||
152 | 152 | LDUR | v | s | S | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xBC400000 | vldurs, | vldurs, /* 0xBC400000 LDUR */ | 0xBC400000, /* LDUR vldurs */ | |||||||||||||||||||||||||
153 | 153 | STUR | x | X | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xF8000000 | sturx, | sturx, /* 0xF8000000 STUR */ | 0xF8000000, /* STUR sturx */ | ||||||||||||||||||||||||||
154 | 154 | LDUR | x | X | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xF8400000 | ldurx, | ldurx, /* 0xF8400000 LDUR */ | 0xF8400000, /* LDUR ldurx */ | ||||||||||||||||||||||||||
155 | 155 | PRFUM | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xF8800000 | prfum, | prfum, /* 0xF8800000 PRFUM */ | 0xF8800000, /* PRFUM prfum */ | ||||||||||||||||||||||||||||
156 | 156 | STUR | v | d | D | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xFC000000 | vsturd, | vsturd, /* 0xFC000000 STUR */ | 0xFC000000, /* STUR vsturd */ | |||||||||||||||||||||||||
157 | 157 | LDUR | v | d | D | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xFC400000 | vldurd, | vldurd, /* 0xFC400000 LDUR */ | 0xFC400000, /* LDUR vldurd */ | |||||||||||||||||||||||||
158 | 158 | Load/store register (immediate post-indexed) | size | 1 | 1 | 1 | V | 0 | 0 | opc | 0 | imm9 | 0 | 1 | Rn | Rt | /* Load/store register (immediate post-indexed) */ | /* Load/store register (immediate post-indexed) */ | |||||||||||||||||||||||||||||||||
159 | 159 | STRB | post | post | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38000400 | strbpost, | strbpost, /* 0x38000400 STRB */ | 0x38000400, /* STRB strbpost */ | ||||||||||||||||||||||||||
160 | 160 | LDRB | post | post | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38400400 | ldrbpost, | ldrbpost, /* 0x38400400 LDRB */ | 0x38400400, /* LDRB ldrbpost */ | ||||||||||||||||||||||||||
161 | 161 | LDRSB | postx | post | X | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38800400 | ldrsbpostx, | ldrsbpostx, /* 0x38800400 LDRSB */ | 0x38800400, /* LDRSB ldrsbpostx */ | |||||||||||||||||||||||||
162 | 162 | LDRSB | postw | post | W | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38C00400 | ldrsbpostw, | ldrsbpostw, /* 0x38C00400 LDRSB */ | 0x38C00400, /* LDRSB ldrsbpostw */ | |||||||||||||||||||||||||
163 | 163 | STR | v | postb | post | B | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3C000400 | vstrpostb, | vstrpostb, /* 0x3C000400 STR */ | 0x3C000400, /* STR vstrpostb */ | ||||||||||||||||||||||||
164 | 164 | LDR | v | postb | post | B | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3C400400 | vldrpostb, | vldrpostb, /* 0x3C400400 LDR */ | 0x3C400400, /* LDR vldrpostb */ | ||||||||||||||||||||||||
165 | 165 | STR | v | postq | post | Q | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3C800400 | vstrpostq, | vstrpostq, /* 0x3C800400 STR */ | 0x3C800400, /* STR vstrpostq */ | ||||||||||||||||||||||||
166 | 166 | LDR | v | postq | post | Q | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3CC00400 | vldrpostq, | vldrpostq, /* 0x3CC00400 LDR */ | 0x3CC00400, /* LDR vldrpostq */ | ||||||||||||||||||||||||
167 | 167 | STRH | post | post | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78000400 | strhpost, | strhpost, /* 0x78000400 STRH */ | 0x78000400, /* STRH strhpost */ | ||||||||||||||||||||||||||
168 | 168 | LDRH | post | post | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78400400 | ldrhpost, | ldrhpost, /* 0x78400400 LDRH */ | 0x78400400, /* LDRH ldrhpost */ | ||||||||||||||||||||||||||
169 | 169 | LDRSH | postx | post | X | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78800400 | ldrshpostx, | ldrshpostx, /* 0x78800400 LDRSH */ | 0x78800400, /* LDRSH ldrshpostx */ | |||||||||||||||||||||||||
170 | 170 | LDRSH | postw | post | W | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78C00400 | ldrshpostw, | ldrshpostw, /* 0x78C00400 LDRSH */ | 0x78C00400, /* LDRSH ldrshpostw */ | |||||||||||||||||||||||||
171 | 171 | STR | v | posth | post | H | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x7C000400 | vstrposth, | vstrposth, /* 0x7C000400 STR */ | 0x7C000400, /* STR vstrposth */ | ||||||||||||||||||||||||
172 | 172 | LDR | v | posth | post | H | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x7C400400 | vldrposth, | vldrposth, /* 0x7C400400 LDR */ | 0x7C400400, /* LDR vldrposth */ | ||||||||||||||||||||||||
173 | 173 | STR | postw | post | W | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xB8000400 | strpostw, | strpostw, /* 0xB8000400 STR */ | 0xB8000400, /* STR strpostw */ | |||||||||||||||||||||||||
174 | 174 | LDR | postw | post | W | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xB8400400 | ldrpostw, | ldrpostw, /* 0xB8400400 LDR */ | 0xB8400400, /* LDR ldrpostw */ | |||||||||||||||||||||||||
175 | 175 | LDRSW | post | post | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xB8800400 | ldrswpost, | ldrswpost, /* 0xB8800400 LDRSW */ | 0xB8800400, /* LDRSW ldrswpost */ | ||||||||||||||||||||||||||
176 | 176 | STR | v | posts | post | S | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xBC000400 | vstrposts, | vstrposts, /* 0xBC000400 STR */ | 0xBC000400, /* STR vstrposts */ | ||||||||||||||||||||||||
177 | 177 | LDR | v | posts | post | S | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xBC400400 | vldrposts, | vldrposts, /* 0xBC400400 LDR */ | 0xBC400400, /* LDR vldrposts */ | ||||||||||||||||||||||||
178 | 178 | STR | postx | post | X | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xF8000400 | strpostx, | strpostx, /* 0xF8000400 STR */ | 0xF8000400, /* STR strpostx */ | |||||||||||||||||||||||||
179 | 179 | LDR | postx | post | X | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xF8400400 | ldrpostx, | ldrpostx, /* 0xF8400400 LDR */ | 0xF8400400, /* LDR ldrpostx */ | |||||||||||||||||||||||||
180 | 180 | STR | v | postd | post | D | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xFC000400 | vstrpostd, | vstrpostd, /* 0xFC000400 STR */ | 0xFC000400, /* STR vstrpostd */ | ||||||||||||||||||||||||
181 | 181 | LDR | v | postd | post | D | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | imm9 | 0 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xFC400400 | vldrpostd, | vldrpostd, /* 0xFC400400 LDR */ | 0xFC400400, /* LDR vldrpostd */ | ||||||||||||||||||||||||
182 | 182 | Load/store register (unprivileged) | size | 1 | 1 | 1 | V | 0 | 0 | opc | 0 | imm9 | 1 | 0 | Rn | Rt | /* Load/store register (unprivileged) */ | /* Load/store register (unprivileged) */ | |||||||||||||||||||||||||||||||||
183 | 183 | STTRB | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38000800 | sttrb, | sttrb, /* 0x38000800 STTRB */ | 0x38000800, /* STTRB sttrb */ | ||||||||||||||||||||||||||||
184 | 184 | LDTRB | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38400800 | ldtrb, | ldtrb, /* 0x38400800 LDTRB */ | 0x38400800, /* LDTRB ldtrb */ | ||||||||||||||||||||||||||||
185 | 185 | LDTRSB | x | X | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38800800 | ldtrsbx, | ldtrsbx, /* 0x38800800 LDTRSB */ | 0x38800800, /* LDTRSB ldtrsbx */ | ||||||||||||||||||||||||||
186 | 186 | LDTRSB | w | W | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38C00800 | ldtrsbw, | ldtrsbw, /* 0x38C00800 LDTRSB */ | 0x38C00800, /* LDTRSB ldtrsbw */ | ||||||||||||||||||||||||||
187 | 187 | STTRH | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78000800 | sttrh, | sttrh, /* 0x78000800 STTRH */ | 0x78000800, /* STTRH sttrh */ | ||||||||||||||||||||||||||||
188 | 188 | LDTRH | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78400800 | ldtrh, | ldtrh, /* 0x78400800 LDTRH */ | 0x78400800, /* LDTRH ldtrh */ | ||||||||||||||||||||||||||||
189 | 189 | LDTRSH | x | X | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78800800 | ldtrshx, | ldtrshx, /* 0x78800800 LDTRSH */ | 0x78800800, /* LDTRSH ldtrshx */ | ||||||||||||||||||||||||||
190 | 190 | LDTRSH | w | W | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x78C00800 | ldtrshw, | ldtrshw, /* 0x78C00800 LDTRSH */ | 0x78C00800, /* LDTRSH ldtrshw */ | ||||||||||||||||||||||||||
191 | 191 | STTR | w | W | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xB8000800 | sttrw, | sttrw, /* 0xB8000800 STTR */ | 0xB8000800, /* STTR sttrw */ | ||||||||||||||||||||||||||
192 | 192 | LDTR | w | W | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xB8400800 | ldtrw, | ldtrw, /* 0xB8400800 LDTR */ | 0xB8400800, /* LDTR ldtrw */ | ||||||||||||||||||||||||||
193 | 193 | LDTRSW | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xB8800800 | ldtrsw, | ldtrsw, /* 0xB8800800 LDTRSW */ | 0xB8800800, /* LDTRSW ldtrsw */ | ||||||||||||||||||||||||||||
194 | 194 | STTR | x | X | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xF8000800 | sttrx, | sttrx, /* 0xF8000800 STTR */ | 0xF8000800, /* STTR sttrx */ | ||||||||||||||||||||||||||
195 | 195 | LDTR | x | X | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 1 | 0 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0xF8400800 | ldtrx, | ldtrx, /* 0xF8400800 LDTR */ | 0xF8400800, /* LDTR ldtrx */ | ||||||||||||||||||||||||||
196 | 196 | Load/store register (immediate pre-indexed) | size | 1 | 1 | 1 | V | 0 | 0 | opc | 0 | imm9 | 1 | 1 | Rn | Rt | /* Load/store register (immediate pre-indexed) */ | /* Load/store register (immediate pre-indexed) */ | |||||||||||||||||||||||||||||||||
197 | 197 | STRB | pre | pre | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | imm9 | 1 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38000C00 | strbpre, | strbpre, /* 0x38000C00 STRB */ | 0x38000C00, /* STRB strbpre */ | ||||||||||||||||||||||||||
198 | 198 | LDRB | pre | pre | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | imm9 | 1 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38400C00 | ldrbpre, | ldrbpre, /* 0x38400C00 LDRB */ | 0x38400C00, /* LDRB ldrbpre */ | ||||||||||||||||||||||||||
199 | 199 | LDRSB | prex | pre | X | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | imm9 | 1 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38800C00 | ldrsbprex, | ldrsbprex, /* 0x38800C00 LDRSB */ | 0x38800C00, /* LDRSB ldrsbprex */ | |||||||||||||||||||||||||
200 | 200 | LDRSB | prew | pre | W | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | imm9 | 1 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x38C00C00 | ldrsbprew, | ldrsbprew, /* 0x38C00C00 LDRSB */ | 0x38C00C00, /* LDRSB ldrsbprew */ | |||||||||||||||||||||||||
201 | 201 | STR | v | preb | pre | B | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | imm9 | 1 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3C000C00 | vstrpreb, | vstrpreb, /* 0x3C000C00 STR */ | 0x3C000C00, /* STR vstrpreb */ | ||||||||||||||||||||||||
202 | 202 | LDR | v | preb | pre | B | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | imm9 | 1 | 1 | Rn | Rt | -:-:-:-:-:-:-:-:-:-:-:imm9:::::::::-:-:Rn:::::Rt:::: | 0x3C400C00 | vldrpreb, | vldrpreb, /* 0x3C400C00 LDR */ | 0x3C400C00, /* LDR vldrpreb */ |