Skip to content

Commit 2ff4deb

Browse files
AliMoalAliMoal
committed
Initial commit
0 parents  commit 2ff4deb

File tree

2 files changed

+565
-0
lines changed

2 files changed

+565
-0
lines changed

‎ADS131.c

+295
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,295 @@
1+
#include "ADS131.h"
2+
3+
#define ADS131_RawToAdcValue(oneData) ((int32_t)(((oneData[0] << 16) | (oneData[1] << 8) | (oneData[2])) << 8) / 256)
4+
#ifdef Debug_Enable
5+
#include <stdio.h> // for debug
6+
#define PROGRAMLOG(arg...) printf(arg)
7+
#else
8+
#define PROGRAMLOG(arg...)
9+
#endif
10+
11+
#define EnableRegistersInContinuousMode() ADC_Handler->ADC_CS_LOW(); \
12+
Delay_US(5); \
13+
ADC_Handler->ADC_Transmit(STOP); \
14+
Delay_US(5); \
15+
ADC_Handler->ADC_Transmit(SDATAC); \
16+
Delay_US(5); \
17+
ADC_Handler->ADC_CS_HIGH(); \
18+
Delay_US(5)
19+
20+
#define DisableRegistersInContinuousMode() Delay_US(5); \
21+
ADC_Handler->ADC_CS_LOW(); \
22+
Delay_US(5); \
23+
ADC_Handler->ADC_Transmit(RDATAC); \
24+
Delay_US(5); \
25+
ADC_Handler->ADC_Transmit(START); \
26+
Delay_US(5); \
27+
ADC_Handler->ADC_CS_HIGH(); \
28+
Delay_US(5)
29+
30+
31+
typedef enum ADS131Commands_s {
32+
// SYSTEM COMMANDS
33+
WAKEUP = 0x02, // Wake-up from standby mode
34+
STANDBY = 0x04, // Enter standby mode
35+
RESET = 0x06, // Reset the device
36+
START = 0x08, // Start or restart (synchronize) conversions
37+
STOP = 0x0A, // Stop conversions
38+
OFFSETCAL = 0x1A, // Channel offset calibration
39+
// DATA READ COMMANDS
40+
RDATAC = 0x10, // Enable read data continuous mode. This mode is the default mode at power-up. When in RDATAC mode, the RREG command is ignored.
41+
SDATAC = 0x11, // Stop read data continuous mode
42+
RDATA = 0x12, // Read data by command
43+
// REGISTER READ COMMANDS
44+
RREG = 0x20, // Read registers
45+
WREG = 0x40 // Write registers
46+
} ADS131Commands;
47+
48+
typedef enum ADS131Register_s {
49+
// DEVICE SETTINGS (Read-Only Registers)
50+
ID = 0x00, // RESET VALUE: 0xD2
51+
// GLOBAL SETTINGS ACROSS CHANNELS
52+
CONFIG1 = 0x01, // RESET VALUE: 0x94
53+
CONFIG2 = 0x02, // RESET VALUE: 0xE0
54+
CONFIG3 = 0x03, // RESET VALUE: 0xE0
55+
FAULT = 0x04, // RESET VALUE: 0x00
56+
// CHANNEL-SPECIFIC SETTINGS
57+
CH1SET = 0x05, // RESET VALUE: 0x10
58+
CH2SET = 0x06, // RESET VALUE: 0x10
59+
CH3SET = 0x07, // RESET VALUE: 0x10
60+
CH4SET = 0x08, // RESET VALUE: 0x10
61+
CH5SET = 0x09, // RESET VALUE: 0x10
62+
CH6SET = 0x0A, // RESET VALUE: 0x10
63+
CH7SET = 0x0B, // RESET VALUE: 0x10
64+
CH8SET = 0x0C, // RESET VALUE: 0x10
65+
// FAULT DETECT STATUS REGISTERS (Read-Only Registers)
66+
FAULT_STATP = 0x12, // RESET VALUE: 0x00
67+
FAULT_STATN = 0x13, // RESET VALUE: 0x00
68+
// GPIO SETTINGS
69+
GPIO = 0x14 // RESET VALUE: 0x0F
70+
} ADS131Register;
71+
72+
#pragma anon_unions
73+
typedef union ADS131_OneSample_u {
74+
struct {
75+
uint32_t Zero :8; // Always Zero
76+
uint32_t Part1:8;
77+
uint32_t Part2:8;
78+
uint32_t Part3:8;
79+
};
80+
int32_t INT32;
81+
} ADS131_OneSample;
82+
83+
static ADS131_OneSample ChannelsData[8] = {0};
84+
85+
static uint8_t ADS131_ReadReg (ADS131_Handler *ADC_Handler,ADS131Register ADS131REG)
86+
{
87+
uint8_t RecByte = 0;
88+
ADC_Handler->ADC_CS_LOW();
89+
Delay_US(5);
90+
ADC_Handler->ADC_Transmit(RREG | ADS131REG);
91+
Delay_US(5);
92+
ADC_Handler->ADC_Transmit(0);
93+
Delay_US(5);
94+
RecByte = ADC_Handler->ADC_Receive();
95+
Delay_US(5);
96+
ADC_Handler->ADC_CS_HIGH();
97+
return RecByte;
98+
};
99+
100+
static void ADS131_WriteReg (ADS131_Handler *ADC_Handler,ADS131Register ADS131REG, uint8_t RegisterValue)
101+
{
102+
ADC_Handler->ADC_CS_LOW();
103+
Delay_US(5);
104+
ADC_Handler->ADC_Transmit(WREG | ADS131REG);
105+
Delay_US(5);
106+
ADC_Handler->ADC_Transmit(0);
107+
Delay_US(5);
108+
ADC_Handler->ADC_Transmit(RegisterValue);
109+
Delay_US(5);
110+
ADC_Handler->ADC_CS_HIGH();
111+
};
112+
113+
void ADS131_Init(ADS131_Handler *ADC_Handler, ADS131_Parameters *Parameters, ADS131_ChannelsConfig *ChannelsConfig, ADS131_GPIOConfig *GPIOConfig)
114+
{
115+
if (!ADC_Handler)
116+
return;
117+
118+
if(ADC_Handler->ADC_RESET_LOW)
119+
ADC_Handler->ADC_RESET_LOW();
120+
if(ADC_Handler->ADC_START_LOW)
121+
ADC_Handler->ADC_START_LOW();
122+
123+
ADC_Handler->ADC_CS_LOW();
124+
Delay_US(5);
125+
ADC_Handler->ADC_Transmit(STOP);
126+
Delay_US(5);
127+
ADC_Handler->ADC_Transmit(SDATAC);
128+
Delay_US(5);
129+
ADC_Handler->ADC_Transmit(RESET);
130+
Delay_US(5);
131+
ADC_Handler->ADC_CS_HIGH();
132+
Delay_US(100);
133+
134+
EnableRegistersInContinuousMode();
135+
136+
PROGRAMLOG("ID: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,ID));
137+
138+
uint8_t RegVal = 0;
139+
140+
if (Parameters)
141+
{
142+
RegVal = (0x90) | ((Parameters->DaisyChain ? 0 : 1) << 6) | (Parameters->OscillatorClkOutput << 5) | (Parameters->DataRate);
143+
ADS131_WriteReg(ADC_Handler,CONFIG1,RegVal);
144+
PROGRAMLOG("CONFIG1: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CONFIG1));
145+
146+
// RegVal = 0; // for Test
147+
// ADS131_WriteReg(ADC_Handler,CONFIG2,RegVal); // for Test
148+
// PROGRAMLOG("CONFIG2: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CONFIG2)); // for Test
149+
150+
RegVal = (0xC0) | (Parameters->IntRefVolt << 5) | (Parameters->OpAmpRef << 3) | (Parameters->OpAmpPowerDown << 2);
151+
ADS131_WriteReg(ADC_Handler,CONFIG3,RegVal);
152+
PROGRAMLOG("CONFIG3: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CONFIG3));
153+
}
154+
else
155+
{
156+
RegVal = 0x96; // 1kSPS
157+
ADS131_WriteReg(ADC_Handler,CONFIG1,RegVal);
158+
PROGRAMLOG("CONFIG1 (default): 0x%X - Must be 0x96\r\n",ADS131_ReadReg(ADC_Handler,CONFIG1));
159+
RegVal = 0xC0; // VREFF: 2.4V
160+
ADS131_WriteReg(ADC_Handler,CONFIG3,RegVal);
161+
PROGRAMLOG("CONFIG3 (default): 0x%X - Must be 0xC1 or 0xC0\r\n",ADS131_ReadReg(ADC_Handler,CONFIG3));
162+
}
163+
164+
if (ChannelsConfig)
165+
{
166+
RegVal = (ChannelsConfig->Ch1PowerDown << 7) | (ChannelsConfig->Ch1PGA << 4) | (ChannelsConfig->Ch1MUX);
167+
ADS131_WriteReg(ADC_Handler,CH1SET,RegVal);
168+
PROGRAMLOG("CH1SET: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CH1SET));
169+
RegVal = (ChannelsConfig->Ch2PowerDown << 7) | (ChannelsConfig->Ch2PGA << 4) | (ChannelsConfig->Ch2MUX);
170+
ADS131_WriteReg(ADC_Handler,CH2SET,RegVal);
171+
PROGRAMLOG("CH2SET: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CH2SET));
172+
RegVal = (ChannelsConfig->Ch3PowerDown << 7) | (ChannelsConfig->Ch3PGA << 4) | (ChannelsConfig->Ch3MUX);
173+
ADS131_WriteReg(ADC_Handler,CH3SET,RegVal);
174+
PROGRAMLOG("CH3SET: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CH1SET));
175+
RegVal = (ChannelsConfig->Ch4PowerDown << 7) | (ChannelsConfig->Ch4PGA << 4) | (ChannelsConfig->Ch4MUX);
176+
ADS131_WriteReg(ADC_Handler,CH4SET,RegVal);
177+
PROGRAMLOG("CH4SET: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CH4SET));
178+
RegVal = (ChannelsConfig->Ch5PowerDown << 7) | (ChannelsConfig->Ch5PGA << 4) | (ChannelsConfig->Ch5MUX);
179+
ADS131_WriteReg(ADC_Handler,CH5SET,RegVal);
180+
PROGRAMLOG("CH5SET: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CH5SET));
181+
RegVal = (ChannelsConfig->Ch6PowerDown << 7) | (ChannelsConfig->Ch6PGA << 4) | (ChannelsConfig->Ch6MUX);
182+
ADS131_WriteReg(ADC_Handler,CH6SET,RegVal);
183+
PROGRAMLOG("CH6SET: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CH6SET));
184+
RegVal = (ChannelsConfig->Ch7PowerDown << 7) | (ChannelsConfig->Ch7PGA << 4) | (ChannelsConfig->Ch7MUX);
185+
ADS131_WriteReg(ADC_Handler,CH7SET,RegVal);
186+
PROGRAMLOG("CH7SET: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CH7SET));
187+
RegVal = (ChannelsConfig->Ch8PowerDown << 7) | (ChannelsConfig->Ch8PGA << 4) | (ChannelsConfig->Ch8MUX);
188+
ADS131_WriteReg(ADC_Handler,CH8SET,RegVal);
189+
PROGRAMLOG("CH8SET: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,CH8SET));
190+
}
191+
192+
if(GPIOConfig)
193+
{
194+
RegVal = 0x50;//(GPIOConfig->GPIO4High << 7) | (GPIOConfig->GPIO3High << 6) | (GPIOConfig->GPIO2High << 5) | (GPIOConfig->GPIO1High << 4) |(GPIOConfig->GPIO4Input << 3) | (GPIOConfig->GPIO3Input << 2) | (GPIOConfig->GPIO2Input << 1) | (GPIOConfig->GPIO1Input);
195+
ADS131_WriteReg(ADC_Handler,GPIO,RegVal);
196+
PROGRAMLOG("GPIO: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,GPIO));
197+
}
198+
199+
DisableRegistersInContinuousMode();
200+
};
201+
202+
void ADS131_ReadData(ADS131_Handler *ADC_Handler, uint8_t *State /* 3 Elements ([0]: MSB) */,int32_t *ChSamples /* 8 Elements ([0]: Ch1)*/)
203+
{
204+
ADC_Handler->ADC_CS_LOW();
205+
Delay_US(5);
206+
State[0] = ADC_Handler->ADC_Receive();
207+
Delay_US(1);
208+
State[1] = ADC_Handler->ADC_Receive();
209+
Delay_US(1);
210+
State[2] = ADC_Handler->ADC_Receive();
211+
Delay_US(1);
212+
ChannelsData[0].Part1 = ADC_Handler->ADC_Receive();
213+
Delay_US(1);
214+
ChannelsData[0].Part2 = ADC_Handler->ADC_Receive();
215+
Delay_US(1);
216+
ChannelsData[0].Part3 = ADC_Handler->ADC_Receive();
217+
Delay_US(1);
218+
ChannelsData[1].Part1 = ADC_Handler->ADC_Receive();
219+
Delay_US(1);
220+
ChannelsData[1].Part2 = ADC_Handler->ADC_Receive();
221+
Delay_US(1);
222+
ChannelsData[1].Part3 = ADC_Handler->ADC_Receive();
223+
Delay_US(1);
224+
ChannelsData[2].Part1 = ADC_Handler->ADC_Receive();
225+
Delay_US(1);
226+
ChannelsData[2].Part2 = ADC_Handler->ADC_Receive();
227+
Delay_US(1);
228+
ChannelsData[2].Part3 = ADC_Handler->ADC_Receive();
229+
Delay_US(1);
230+
ChannelsData[3].Part1 = ADC_Handler->ADC_Receive();
231+
Delay_US(1);
232+
ChannelsData[3].Part2 = ADC_Handler->ADC_Receive();
233+
Delay_US(1);
234+
ChannelsData[3].Part3 = ADC_Handler->ADC_Receive();
235+
Delay_US(1);
236+
ChannelsData[4].Part1 = ADC_Handler->ADC_Receive();
237+
Delay_US(1);
238+
ChannelsData[4].Part2 = ADC_Handler->ADC_Receive();
239+
Delay_US(1);
240+
ChannelsData[4].Part3 = ADC_Handler->ADC_Receive();
241+
Delay_US(1);
242+
ChannelsData[5].Part1 = ADC_Handler->ADC_Receive();
243+
Delay_US(1);
244+
ChannelsData[5].Part2 = ADC_Handler->ADC_Receive();
245+
Delay_US(1);
246+
ChannelsData[5].Part3 = ADC_Handler->ADC_Receive();
247+
Delay_US(1);
248+
ChannelsData[6].Part1 = ADC_Handler->ADC_Receive();
249+
Delay_US(1);
250+
ChannelsData[6].Part2 = ADC_Handler->ADC_Receive();
251+
Delay_US(1);
252+
ChannelsData[6].Part3 = ADC_Handler->ADC_Receive();
253+
Delay_US(1);
254+
ChannelsData[7].Part1 = ADC_Handler->ADC_Receive();
255+
Delay_US(1);
256+
ChannelsData[7].Part2 = ADC_Handler->ADC_Receive();
257+
Delay_US(1);
258+
ChannelsData[7].Part3 = ADC_Handler->ADC_Receive();
259+
Delay_US(5);
260+
ADC_Handler->ADC_CS_HIGH();
261+
ChSamples[0] = ChannelsData[0].INT32 / 255;
262+
ChSamples[1] = ChannelsData[1].INT32 / 255;
263+
ChSamples[2] = ChannelsData[2].INT32 / 255;
264+
ChSamples[3] = ChannelsData[3].INT32 / 255;
265+
ChSamples[4] = ChannelsData[4].INT32 / 255;
266+
ChSamples[5] = ChannelsData[5].INT32 / 255;
267+
ChSamples[6] = ChannelsData[6].INT32 / 255;
268+
ChSamples[7] = ChannelsData[7].INT32 / 255;
269+
}
270+
271+
void ADS131_ConfigGPIO(ADS131_Handler *ADC_Handler,ADS131_GPIOConfig *GPIOConfig)
272+
{
273+
if((!GPIOConfig) || (!ADC_Handler))
274+
return;
275+
276+
EnableRegistersInContinuousMode();
277+
278+
uint8_t RegVal = (GPIOConfig->GPIO4High << 7) | (GPIOConfig->GPIO3High << 6) | (GPIOConfig->GPIO2High << 5) | (GPIOConfig->GPIO1High << 4) |(GPIOConfig->GPIO4Input << 3) | (GPIOConfig->GPIO3Input << 2) | (GPIOConfig->GPIO2Input << 1) | (GPIOConfig->GPIO1Input);
279+
ADS131_WriteReg(ADC_Handler,GPIO,RegVal);
280+
PROGRAMLOG("GPIO: 0x%X\r\n",ADS131_ReadReg(ADC_Handler,GPIO));
281+
282+
DisableRegistersInContinuousMode();
283+
}
284+
285+
void ADS131_ReadGPIO(ADS131_Handler *ADC_Handler, bool *GPIOstate /* 4 Element ([0]: GPIO1)*/)
286+
{
287+
EnableRegistersInContinuousMode();
288+
uint8_t RegVal = ADS131_ReadReg(ADC_Handler,GPIO);
289+
PROGRAMLOG("GPIO: 0x%X\r\n",RegVal);
290+
DisableRegistersInContinuousMode();
291+
GPIOstate[0] = (RegVal >> 4) & 1;
292+
GPIOstate[1] = (RegVal >> 5) & 1;
293+
GPIOstate[2] = (RegVal >> 6) & 1;
294+
GPIOstate[3] = (RegVal >> 7) & 1;
295+
}

0 commit comments

Comments
 (0)