From 83a6c38a8240e75e2eb4b8a01578649261bae9b2 Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Wed, 5 Mar 2025 17:52:59 -0300 Subject: [PATCH 01/12] odb: add Tcl functions to add pin groups and mirrored pins Signed-off-by: Eder Monteiro --- src/odb/src/db/odb.tcl | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/odb/src/db/odb.tcl b/src/odb/src/db/odb.tcl index 9634d40b6bb..c0f14f74872 100644 --- a/src/odb/src/db/odb.tcl +++ b/src/odb/src/db/odb.tcl @@ -676,4 +676,20 @@ proc design_is_routed { args } { set block [$chip getBlock] return [$block designIsRouted [info exists flags(-verbose)]] + +namespace eval odb { +proc add_pin_group {pin_list order} { + set db [ord::get_db] + set chip [$db getChip] + set block [$chip getBlock] + + $block addBTermGroup $pin_list $order +} + +proc add_mirrored_pins {bterm1 bterm2} { + if {$bterm1 != "NULL" && $bterm2 != "NULL"} { + $bterm1 setMirroredBTerm $bterm2 + $bterm2 setMirroredBTerm $bterm1 + } +} } \ No newline at end of file From b3605a115a0b0fac546f3e093c5110bf3f7a7202 Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Thu, 6 Mar 2025 17:47:10 -0300 Subject: [PATCH 02/12] odb: add aux functions in odb.tcl Signed-off-by: Eder Monteiro --- src/odb/src/db/odb.tcl | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/src/odb/src/db/odb.tcl b/src/odb/src/db/odb.tcl index c0f14f74872..3c11bbc5551 100644 --- a/src/odb/src/db/odb.tcl +++ b/src/odb/src/db/odb.tcl @@ -692,4 +692,33 @@ proc add_mirrored_pins {bterm1 bterm2} { $bterm2 setMirroredBTerm $bterm1 } } + +proc parse_direction { cmd direction } { + if { + [regexp -nocase -- {^INPUT$} $direction] || + [regexp -nocase -- {^OUTPUT$} $direction] || + [regexp -nocase -- {^INOUT$} $direction] || + [regexp -nocase -- {^FEEDTHRU$} $direction] + } { + return [string tolower $direction] + } else { + utl::error ODB 12 "$cmd: Invalid bterm direction." + } +} + +proc check_edge { edge } { + if { + $edge != "top" && $edge != "bottom" && + $edge != "left" && $edge != "right" + } { + utl::error ODB 11 "$cmd: $edge is an invalid edge. Use top, bottom, left or right." + } + return $edge +} + +proc get_block {} { + set db [ord::get_db] + set chip [$db getChip] + return [$chip getBlock] +} } \ No newline at end of file From 1b42aeb8038869771fd70af1c50de5e253541272 Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Thu, 6 Mar 2025 17:49:06 -0300 Subject: [PATCH 03/12] odb: add functions to set direction and name constraints for bterms Signed-off-by: Eder Monteiro --- src/odb/include/odb/db.h | 18 +++++++++++++ src/odb/src/db/dbBlock.cpp | 54 ++++++++++++++++++++++++++++++++++++++ src/odb/src/db/odb.tcl | 19 +++++++++++--- 3 files changed, 88 insertions(+), 3 deletions(-) diff --git a/src/odb/include/odb/db.h b/src/odb/include/odb/db.h index 87e2e196d47..1884aabede0 100644 --- a/src/odb/include/odb/db.h +++ b/src/odb/include/odb/db.h @@ -981,6 +981,24 @@ class dbBlock : public dbObject /// void addBTermGroup(const std::vector& bterms, bool order); + /// + /// Find the rectangle corresponding to the constraint region in a specific + /// edge of the die area. + /// + Rect findConstraintRegion(const std::string& edge, int begin, int end); + + /// + /// Add region constraint for dbBTerms according to their IO type. + /// + void addBTermDirectionConstraint(const std::string& direction, + const Rect& constraint_region); + + /// + /// Add region constraint for dbBTerms according to their names. + /// + void addBTermNamesConstraint(const std::vector& bterms, + const Rect& constraint_region); + /// /// Get all the instance-terminals of this block. /// diff --git a/src/odb/src/db/dbBlock.cpp b/src/odb/src/db/dbBlock.cpp index ff929ad4764..21ca3177d31 100644 --- a/src/odb/src/db/dbBlock.cpp +++ b/src/odb/src/db/dbBlock.cpp @@ -1627,6 +1627,60 @@ void dbBlock::addBTermGroup(const std::vector& bterms, bool order) block->_bterm_groups.push_back(std::move(group)); } +Rect dbBlock::findConstraintRegion(const std::string& edge, int begin, int end) +{ + Rect constraint_region; + const Rect& die_bounds = getDieArea(); + if (edge == "bottom") { + constraint_region = Rect(begin, die_bounds.yMin(), end, die_bounds.yMin()); + } else if (edge == "top") { + constraint_region = Rect(begin, die_bounds.yMax(), end, die_bounds.yMax()); + } else if (edge == "left") { + constraint_region = Rect(die_bounds.xMin(), begin, die_bounds.xMin(), end); + } else if (edge == "right") { + constraint_region = Rect(die_bounds.xMax(), begin, die_bounds.xMax(), end); + } + + return constraint_region; +} + +void dbBlock::addBTermDirectionConstraint(const std::string& direction, + const Rect& constraint_region) +{ + odb::dbIoType dir; + if (direction == "input") { + dir = odb::dbIoType::INPUT; + } else if (direction == "output") { + dir = odb::dbIoType::OUTPUT; + } else if (direction == "inout") { + dir = odb::dbIoType::INOUT; + } else { + dir = odb::dbIoType::FEEDTHRU; + } + + for (dbBTerm* bterm : getBTerms()) { + if (bterm->getIoType().getValue() == dir.getValue()) { + bterm->setConstraintRegion(constraint_region); + } + } +} + +void dbBlock::addBTermNamesConstraint(const std::vector& bterms, + const Rect& constraint_region) +{ + for (dbBTerm* bterm : bterms) { + if (bterm->getConstraintRegion()) { + getImpl()->getLogger()->error( + utl::ODB, + 239, + "Pin {} is assigned to multiple constraints.", + bterm->getName()); + } else { + bterm->setConstraintRegion(constraint_region); + } + } +} + dbSet dbBlock::getITerms() { _dbBlock* block = (_dbBlock*) this; diff --git a/src/odb/src/db/odb.tcl b/src/odb/src/db/odb.tcl index 3c11bbc5551..9def39eb407 100644 --- a/src/odb/src/db/odb.tcl +++ b/src/odb/src/db/odb.tcl @@ -678,10 +678,23 @@ proc design_is_routed { args } { return [$block designIsRouted [info exists flags(-verbose)]] namespace eval odb { + +proc add_direction_constraint { dir edge begin end } { + set block [get_block] + + set direction [parse_direction "add_direction_constraint" $dir] + set constraint_region [$block findConstraintRegion $edge $begin $end] + $block addBTermDirectionConstraint $direction $constraint_region +} + +proc add_names_constraint { names edge begin end } { + set pin_list [ppl::parse_pin_names "set_io_pin_constraints" $names] + set constraint_region [$block findConstraintRegion $edge $begin $end] + $block addBTermNamesConstraint $pin_list $constraint_region +} + proc add_pin_group {pin_list order} { - set db [ord::get_db] - set chip [$db getChip] - set block [$chip getBlock] + set block [get_block] $block addBTermGroup $pin_list $order } From 56e6fe2b80d6bf34f18a8e9fe5aa896782546929 Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Thu, 6 Mar 2025 18:00:25 -0300 Subject: [PATCH 04/12] odb: bug fix Signed-off-by: Eder Monteiro --- src/odb/src/db/odb.tcl | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/odb/src/db/odb.tcl b/src/odb/src/db/odb.tcl index 9def39eb407..fdb055c2a25 100644 --- a/src/odb/src/db/odb.tcl +++ b/src/odb/src/db/odb.tcl @@ -688,6 +688,8 @@ proc add_direction_constraint { dir edge begin end } { } proc add_names_constraint { names edge begin end } { + set block [get_block] + set pin_list [ppl::parse_pin_names "set_io_pin_constraints" $names] set constraint_region [$block findConstraintRegion $edge $begin $end] $block addBTermNamesConstraint $pin_list $constraint_region From 392c141b7a22a0e92dc12026374ed1735d1e57cc Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Thu, 6 Mar 2025 18:00:54 -0300 Subject: [PATCH 05/12] odb: add function to reset constraint region of dbBTerms Signed-off-by: Eder Monteiro --- src/odb/include/odb/db.h | 5 +++++ src/odb/src/db/dbBTerm.cpp | 6 ++++++ src/ppl/src/IOPlacer.cpp | 3 +++ 3 files changed, 14 insertions(+) diff --git a/src/odb/include/odb/db.h b/src/odb/include/odb/db.h index 1884aabede0..73fbf208ea9 100644 --- a/src/odb/include/odb/db.h +++ b/src/odb/include/odb/db.h @@ -1885,6 +1885,11 @@ class dbBTerm : public dbObject /// std::optional getConstraintRegion(); + /// + /// Reset constraint region. + /// + void resetConstraintRegion(); + /// /// Set the bterm which position is mirrored to this bterm /// diff --git a/src/odb/src/db/dbBTerm.cpp b/src/odb/src/db/dbBTerm.cpp index 03113036d70..58170b825bc 100644 --- a/src/odb/src/db/dbBTerm.cpp +++ b/src/odb/src/db/dbBTerm.cpp @@ -968,6 +968,12 @@ std::optional dbBTerm::getConstraintRegion() return bterm->_constraint_region; } +void dbBTerm::resetConstraintRegion() +{ + _dbBTerm* bterm = (_dbBTerm*) this; + bterm->_constraint_region.mergeInit(); +} + void dbBTerm::setMirroredBTerm(dbBTerm* mirrored_bterm) { _dbBTerm* bterm = (_dbBTerm*) this; diff --git a/src/ppl/src/IOPlacer.cpp b/src/ppl/src/IOPlacer.cpp index f55aa0f5b3a..308c683bfd9 100644 --- a/src/ppl/src/IOPlacer.cpp +++ b/src/ppl/src/IOPlacer.cpp @@ -111,6 +111,9 @@ odb::dbTechLayer* IOPlacer::getTopLayer() const void IOPlacer::clearConstraints() { constraints_.clear(); + for (odb::dbBTerm* bterm : getBlock()->getBTerms()) { + bterm->resetConstraintRegion(); + } } std::string IOPlacer::getEdgeString(Edge edge) From 05ed61559a388947a8360fb1cf7f880140749bbb Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Thu, 6 Mar 2025 18:33:46 -0300 Subject: [PATCH 06/12] ppl: remove outdated structures and use dbBlock pin groups Signed-off-by: Eder Monteiro --- src/ppl/include/ppl/IOPlacer.h | 8 -------- src/ppl/src/IOPlacer.cpp | 25 +++++++------------------ src/ppl/src/IOPlacer.i | 6 ------ src/ppl/src/IOPlacer.tcl | 6 +++--- 4 files changed, 10 insertions(+), 35 deletions(-) diff --git a/src/ppl/include/ppl/IOPlacer.h b/src/ppl/include/ppl/IOPlacer.h index d046f4ee88b..541773d0a2f 100644 --- a/src/ppl/include/ppl/IOPlacer.h +++ b/src/ppl/include/ppl/IOPlacer.h @@ -80,12 +80,6 @@ using PinSet = std::set; using PinList = std::vector; using MirroredPins = std::unordered_map; -struct PinGroup -{ - PinList pins; - bool order; -}; - struct PinGroupByIndex { std::vector pin_indices; @@ -140,7 +134,6 @@ class IOPlacer void addMirroredPins(odb::dbBTerm* bterm1, odb::dbBTerm* bterm2); void addHorLayer(odb::dbTechLayer* layer); void addVerLayer(odb::dbTechLayer* layer); - void addPinGroup(PinList* group, bool order); void addTopLayerPinPattern(odb::dbTechLayer* layer, int x_step, int y_step, @@ -313,7 +306,6 @@ class IOPlacer std::vector excluded_intervals_; std::vector constraints_; - std::vector pin_groups_; MirroredPins mirrored_pins_; FallbackPins fallback_pins_; std::map> layer_fixed_pins_shapes_; diff --git a/src/ppl/src/IOPlacer.cpp b/src/ppl/src/IOPlacer.cpp index 308c683bfd9..c99630aa26c 100644 --- a/src/ppl/src/IOPlacer.cpp +++ b/src/ppl/src/IOPlacer.cpp @@ -99,7 +99,6 @@ void IOPlacer::clear() top_layer_slots_.clear(); assignment_.clear(); excluded_intervals_.clear(); - pin_groups_.clear(); *parms_ = Parameters(); } @@ -2082,11 +2081,12 @@ void IOPlacer::checkPinsInMultipleConstraints() void IOPlacer::checkPinsInMultipleGroups() { std::string pins_in_mult_groups; - if (!pin_groups_.empty()) { + const auto& bterm_groups = getBlock()->getBTermGroups(); + if (!bterm_groups.empty()) { for (IOPin& io_pin : netlist_->getIOPins()) { int group_cnt = 0; - for (PinGroup& group : pin_groups_) { - const PinList& pin_list = group.pins; + for (const auto& group : bterm_groups) { + const std::vector& pin_list = group.bterms; if (std::find(pin_list.begin(), pin_list.end(), io_pin.getBTerm()) != pin_list.end()) { group_cnt++; @@ -2170,19 +2170,6 @@ std::string IOPlacer::getPinSetOrListString(const PinSetOrList& group) return pin_names; } -void IOPlacer::addPinGroup(PinList* group, bool order) -{ - std::string pin_names = getPinSetOrListString(*group); - - if (logger_->debugCheck(utl::PPL, "pin_groups", 1)) { - debugPrint( - logger_, utl::PPL, "pin_groups", 1, "Pin group: [ {} ]", pin_names); - } else { - logger_->info(utl::PPL, 44, "Pin group: [ {} ]", pin_names); - } - pin_groups_.push_back({*group, order}); -} - void IOPlacer::findPinAssignment(std::vector
& sections, bool mirrored_groups_only) { @@ -3099,7 +3086,9 @@ void IOPlacer::initNetlist() } int group_idx = 0; - for (const auto& [pins, order] : pin_groups_) { + for (const auto& [pins, order] : getBlock()->getBTermGroups()) { + std::string pin_names = getPinSetOrListString(pins); + logger_->info(utl::PPL, 44, "Pin group: [ {} ]", pin_names); int group_created = netlist_->createIOGroup(pins, order, group_idx); if (group_created != pins.size()) { logger_->error(PPL, 94, "Cannot create group of size {}.", pins.size()); diff --git a/src/ppl/src/IOPlacer.i b/src/ppl/src/IOPlacer.i index c0ec67e276d..a7657f457e9 100644 --- a/src/ppl/src/IOPlacer.i +++ b/src/ppl/src/IOPlacer.i @@ -211,12 +211,6 @@ add_ver_layer(odb::dbTechLayer* layer) getIOPlacer()->addVerLayer(layer); } -void -add_pin_group(PinList *pin_list, bool order) -{ - getIOPlacer()->addPinGroup(pin_list, order); -} - void run_hungarian_matching(bool randomMode) { diff --git a/src/ppl/src/IOPlacer.tcl b/src/ppl/src/IOPlacer.tcl index 7a9a1dc4e4c..47357bfd037 100644 --- a/src/ppl/src/IOPlacer.tcl +++ b/src/ppl/src/IOPlacer.tcl @@ -623,11 +623,11 @@ proc place_pins { args } { } if { [llength $pin_groups] != 0 } { - set group_idx 0 foreach group $pin_groups { set pins [ppl::parse_pin_names "place_pins -group_pins" $group] - ppl::add_pin_group $pins 0 - incr group_idx + if { [llength $pins] != 0 } { + odb::add_pin_group $pins 0 + } } } From e781c5164c782dd1ae003418550ef5ec424f5154 Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Fri, 7 Mar 2025 16:46:12 -0300 Subject: [PATCH 07/12] ppl: use mirrored bterms stored in odb to place mirrored pins Signed-off-by: Eder Monteiro --- src/odb/include/odb/db.h | 5 ++ src/odb/src/db/dbBTerm.cpp | 6 +++ src/ppl/include/ppl/IOPlacer.h | 4 -- src/ppl/src/HungarianMatching.cpp | 23 ++++----- src/ppl/src/HungarianMatching.h | 12 ++--- src/ppl/src/IOPlacer.cpp | 79 ++++++++++--------------------- src/ppl/src/IOPlacer.i | 6 --- 7 files changed, 49 insertions(+), 86 deletions(-) diff --git a/src/odb/include/odb/db.h b/src/odb/include/odb/db.h index 73fbf208ea9..58c84ae7a9d 100644 --- a/src/odb/include/odb/db.h +++ b/src/odb/include/odb/db.h @@ -1899,6 +1899,11 @@ class dbBTerm : public dbObject /// Get the bterm that is mirrored to this bterm /// dbBTerm* getMirroredBTerm(); + + /// + /// Returns true if the current BTerm has a mirrored BTerm. + /// + bool hasMirroredBTerm(); }; /////////////////////////////////////////////////////////////////////////////// diff --git a/src/odb/src/db/dbBTerm.cpp b/src/odb/src/db/dbBTerm.cpp index 58170b825bc..626601d53c5 100644 --- a/src/odb/src/db/dbBTerm.cpp +++ b/src/odb/src/db/dbBTerm.cpp @@ -994,4 +994,10 @@ dbBTerm* dbBTerm::getMirroredBTerm() return (dbBTerm*) mirrored_bterm; } +bool dbBTerm::hasMirroredBTerm() +{ + _dbBTerm* bterm = (_dbBTerm*) this; + return bterm->_mirrored_bterm != 0; +} + } // namespace odb diff --git a/src/ppl/include/ppl/IOPlacer.h b/src/ppl/include/ppl/IOPlacer.h index 541773d0a2f..90769061ff1 100644 --- a/src/ppl/include/ppl/IOPlacer.h +++ b/src/ppl/include/ppl/IOPlacer.h @@ -78,7 +78,6 @@ using utl::Logger; // A list of pins that will be placed together in the die boundary using PinSet = std::set; using PinList = std::vector; -using MirroredPins = std::unordered_map; struct PinGroupByIndex { @@ -131,7 +130,6 @@ class IOPlacer int begin, int end); void addTopLayerConstraint(PinSet* pins, const odb::Rect& region); - void addMirroredPins(odb::dbBTerm* bterm1, odb::dbBTerm* bterm2); void addHorLayer(odb::dbTechLayer* layer); void addVerLayer(odb::dbTechLayer* layer); void addTopLayerPinPattern(odb::dbTechLayer* layer, @@ -191,7 +189,6 @@ class IOPlacer std::string getSlotsLocation(Edge edge, bool top_layer); int placeFallbackPins(bool random); void assignMirroredPins(IOPin& io_pin, - MirroredPins& mirrored_pins, std::vector& assignment); int getSlotIdxByPosition(const odb::Point& position, int layer, @@ -306,7 +303,6 @@ class IOPlacer std::vector excluded_intervals_; std::vector constraints_; - MirroredPins mirrored_pins_; FallbackPins fallback_pins_; std::map> layer_fixed_pins_shapes_; diff --git a/src/ppl/src/HungarianMatching.cpp b/src/ppl/src/HungarianMatching.cpp index e37b23fc365..de094f1304f 100644 --- a/src/ppl/src/HungarianMatching.cpp +++ b/src/ppl/src/HungarianMatching.cpp @@ -103,7 +103,6 @@ inline bool samePos(Point& a, Point& b) } void HungarianMatching::getFinalAssignment(std::vector& assignment, - MirroredPins& mirrored_pins, bool assign_mirrored) { size_t rows = non_blocked_slots_; @@ -132,8 +131,7 @@ void HungarianMatching::getFinalAssignment(std::vector& assignment, // Make this check here to avoid messing up the correlation between the // pin sorting and the hungarian matrix values - if ((assign_mirrored - && mirrored_pins.find(io_pin.getBTerm()) == mirrored_pins.end()) + if ((assign_mirrored && !io_pin.getBTerm()->hasMirroredBTerm()) || io_pin.isPlaced()) { continue; } @@ -145,7 +143,7 @@ void HungarianMatching::getFinalAssignment(std::vector& assignment, slots_[slot_index].used = true; if (assign_mirrored) { - assignMirroredPins(io_pin, mirrored_pins, assignment); + assignMirroredPins(io_pin, assignment); } break; } @@ -155,10 +153,9 @@ void HungarianMatching::getFinalAssignment(std::vector& assignment, } void HungarianMatching::assignMirroredPins(IOPin& io_pin, - MirroredPins& mirrored_pins, std::vector& assignment) { - odb::dbBTerm* mirrored_term = mirrored_pins[io_pin.getBTerm()]; + odb::dbBTerm* mirrored_term = io_pin.getBTerm()->getMirroredBTerm(); int mirrored_pin_idx = netlist_->getIoPinIdx(mirrored_term); IOPin& mirrored_pin = netlist_->getIoPin(mirrored_pin_idx); @@ -274,7 +271,6 @@ void HungarianMatching::createMatrixForGroups() } void HungarianMatching::getAssignmentForGroups(std::vector& assignment, - MirroredPins& mirrored_pins, bool only_mirrored) { if (hungarian_matrix_.empty()) { @@ -286,8 +282,8 @@ void HungarianMatching::getAssignmentForGroups(std::vector& assignment, int slot_index = 0; for (const auto& [pins, order] : pin_groups_) { bool assigned = false; - if ((only_mirrored && !groupHasMirroredPin(pins, mirrored_pins)) - || (!only_mirrored && groupHasMirroredPin(pins, mirrored_pins))) { + if ((only_mirrored && !groupHasMirroredPin(pins)) + || (!only_mirrored && groupHasMirroredPin(pins))) { continue; } @@ -316,8 +312,8 @@ void HungarianMatching::getAssignmentForGroups(std::vector& assignment, pin_cnt = (edge_ == Edge::top || edge_ == Edge::left) && order ? pin_cnt - 1 : pin_cnt + 1; - if (mirrored_pins.find(io_pin.getBTerm()) != mirrored_pins.end()) { - assignMirroredPins(io_pin, mirrored_pins, assignment); + if (io_pin.getBTerm()->hasMirroredBTerm()) { + assignMirroredPins(io_pin, assignment); } } assigned = true; @@ -348,12 +344,11 @@ int HungarianMatching::getSlotIdxByPosition(const odb::Point& position, return slot_idx; } -bool HungarianMatching::groupHasMirroredPin(const std::vector& group, - MirroredPins& mirrored_pins) +bool HungarianMatching::groupHasMirroredPin(const std::vector& group) { for (int pin_idx : group) { IOPin& io_pin = netlist_->getIoPin(pin_idx); - if (mirrored_pins.find(io_pin.getBTerm()) != mirrored_pins.end()) { + if (io_pin.getBTerm()->hasMirroredBTerm()) { return true; } } diff --git a/src/ppl/src/HungarianMatching.h b/src/ppl/src/HungarianMatching.h index fd31fb83dac..b671aed0122 100644 --- a/src/ppl/src/HungarianMatching.h +++ b/src/ppl/src/HungarianMatching.h @@ -71,11 +71,8 @@ class HungarianMatching virtual ~HungarianMatching() = default; void findAssignment(); void findAssignmentForGroups(); - void getFinalAssignment(std::vector& assignment, - MirroredPins& mirrored_pins, - bool assign_mirrored); + void getFinalAssignment(std::vector& assignment, bool assign_mirrored); void getAssignmentForGroups(std::vector& assignment, - MirroredPins& mirrored_pins, bool only_mirrored); private: @@ -102,12 +99,9 @@ class HungarianMatching void createMatrix(); void createMatrixForGroups(); - void assignMirroredPins(IOPin& io_pin, - MirroredPins& mirrored_pins, - std::vector& assignment); + void assignMirroredPins(IOPin& io_pin, std::vector& assignment); int getSlotIdxByPosition(const odb::Point& position, int layer) const; - bool groupHasMirroredPin(const std::vector& group, - MirroredPins& mirrored_pins); + bool groupHasMirroredPin(const std::vector& group); Edge getMirroredEdge(const Edge& edge); }; diff --git a/src/ppl/src/IOPlacer.cpp b/src/ppl/src/IOPlacer.cpp index c99630aa26c..68c70e905e3 100644 --- a/src/ppl/src/IOPlacer.cpp +++ b/src/ppl/src/IOPlacer.cpp @@ -317,10 +317,8 @@ void IOPlacer::randomPlacement(const std::vector& pin_indices, for (bool assign_mirrored : {true, false}) { for (int pin_idx : pin_indices) { IOPin& io_pin = io_pins[pin_idx]; - if ((assign_mirrored - && mirrored_pins_.find(io_pin.getBTerm()) == mirrored_pins_.end()) - || (!assign_mirrored - && mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) + if ((assign_mirrored && !io_pin.getBTerm()->hasMirroredBTerm()) + || (!assign_mirrored && io_pin.getBTerm()->hasMirroredBTerm()) || io_pin.isPlaced()) { continue; } @@ -356,9 +354,8 @@ void IOPlacer::randomPlacement(const std::vector& pin_indices, assignment_.push_back(io_pin); io_idx++; - if (assign_mirrored - && mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) { - odb::dbBTerm* mirrored_term = mirrored_pins_[io_pin.getBTerm()]; + if (assign_mirrored && io_pin.getBTerm()->hasMirroredBTerm()) { + odb::dbBTerm* mirrored_term = io_pin.getBTerm()->getMirroredBTerm(); int mirrored_pin_idx = netlist_->getIoPinIdx(mirrored_term); IOPin& mirrored_pin = netlist_->getIoPin(mirrored_pin_idx); @@ -506,11 +503,9 @@ int IOPlacer::placeFallbackPins(bool random) return placed_pins_cnt; } -void IOPlacer::assignMirroredPins(IOPin& io_pin, - MirroredPins& mirrored_pins, - std::vector& assignment) +void IOPlacer::assignMirroredPins(IOPin& io_pin, std::vector& assignment) { - odb::dbBTerm* mirrored_term = mirrored_pins[io_pin.getBTerm()]; + odb::dbBTerm* mirrored_term = io_pin.getBTerm()->getMirroredBTerm(); int mirrored_pin_idx = netlist_->getIoPinIdx(mirrored_term); IOPin& mirrored_pin = netlist_->getIoPin(mirrored_pin_idx); @@ -634,8 +629,8 @@ void IOPlacer::placeFallbackGroup( slot.used = true; slot.blocked = true; place_slot++; - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) { - assignMirroredPins(io_pin, mirrored_pins_, assignment_); + if (io_pin.getBTerm()->hasMirroredBTerm()) { + assignMirroredPins(io_pin, assignment_); } } @@ -1297,7 +1292,7 @@ std::vector
IOPlacer::assignConstrainedPinsToSections( for (int idx : pin_indices) { IOPin& io_pin = netlist_->getIoPin(idx); - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end() + if (io_pin.getBTerm()->hasMirroredBTerm() && !io_pin.isAssignedToSection()) { mirrored_pins_cnt++; } @@ -1323,8 +1318,7 @@ void IOPlacer::assignConstrainedGroupsToSections(Constraint& constraint, } for (int pin_idx : io_group.pin_indices) { IOPin& io_pin = netlist_->getIoPin(pin_idx); - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end() - && mirrored_only) { + if (io_pin.getBTerm()->hasMirroredBTerm() && mirrored_only) { mirrored_pins_cnt++; } } @@ -1337,7 +1331,7 @@ bool IOPlacer::groupHasMirroredPin(const std::vector& group) { for (int pin_idx : group) { IOPin& io_pin = netlist_->getIoPin(pin_idx); - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) { + if (io_pin.getBTerm()->hasMirroredBTerm()) { return true; } } @@ -1358,7 +1352,7 @@ int IOPlacer::assignGroupsToSections(int& mirrored_pins_cnt) if (total_pins_assigned > before_assignment) { for (int pin_idx : io_group.pin_indices) { IOPin& io_pin = netlist_->getIoPin(pin_idx); - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) { + if (io_pin.getBTerm()->hasMirroredBTerm()) { mirrored_pins_cnt++; } } @@ -1420,7 +1414,7 @@ int IOPlacer::assignGroupToSection(const std::vector& io_group, group.push_back(pin_idx); sections[i].used_slots++; io_pin.assignToSection(); - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) { + if (io_pin.getBTerm()->hasMirroredBTerm()) { assignMirroredPin(io_pin); } } @@ -1461,8 +1455,8 @@ void IOPlacer::addGroupToFallback(const std::vector& pin_group, bool order) for (int pin_idx : pin_group) { IOPin& io_pin = netlist_->getIoPin(pin_idx); io_pin.setFallback(); - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) { - odb::dbBTerm* mirrored_term = mirrored_pins_[io_pin.getBTerm()]; + if (io_pin.getBTerm()->hasMirroredBTerm()) { + odb::dbBTerm* mirrored_term = io_pin.getBTerm()->getMirroredBTerm(); int mirrored_pin_idx = netlist_->getIoPinIdx(mirrored_term); IOPin& mirrored_pin = netlist_->getIoPin(mirrored_pin_idx); mirrored_pin.setFallback(); @@ -1483,7 +1477,7 @@ bool IOPlacer::assignPinsToSections(int assigned_pins_count) // Mirrored pins first int idx = 0; for (IOPin& io_pin : net->getIOPins()) { - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) { + if (io_pin.getBTerm()->hasMirroredBTerm()) { if (assignPinToSection(io_pin, idx, sections)) { total_pins_assigned += 2; } @@ -1542,7 +1536,7 @@ bool IOPlacer::assignPinToSection(IOPin& io_pin, pin_assigned = true; io_pin.assignToSection(); - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) { + if (io_pin.getBTerm()->hasMirroredBTerm()) { assignMirroredPin(io_pin); } break; @@ -1555,7 +1549,7 @@ bool IOPlacer::assignPinToSection(IOPin& io_pin, void IOPlacer::assignMirroredPin(IOPin& io_pin) { - odb::dbBTerm* mirrored_term = mirrored_pins_[io_pin.getBTerm()]; + odb::dbBTerm* mirrored_term = io_pin.getBTerm()->getMirroredBTerm(); int mirrored_pin_idx = netlist_->getIoPinIdx(mirrored_term); IOPin& mirrored_pin = netlist_->getIoPin(mirrored_pin_idx); // Mark mirrored pin as assigned to section to prevent assigning it to @@ -1863,18 +1857,6 @@ void IOPlacer::addTopLayerConstraint(PinSet* pins, const odb::Rect& region) } } -void IOPlacer::addMirroredPins(odb::dbBTerm* bterm1, odb::dbBTerm* bterm2) -{ - debugPrint(logger_, - utl::PPL, - "mirrored_pins", - 1, - "Mirroring pins {} and {}", - bterm1->getName(), - bterm2->getName()); - mirrored_pins_[bterm1] = bterm2; -} - void IOPlacer::addHorLayer(odb::dbTechLayer* layer) { hor_layers_.insert(layer->getRoutingLevel()); @@ -1909,16 +1891,12 @@ std::vector IOPlacer::findPinsForConstraint(const Constraint& constraint, } int idx = netlist->getIoPinIdx(bterm); IOPin& io_pin = netlist->getIoPin(idx); - if ((mirrored_only - && mirrored_pins_.find(io_pin.getBTerm()) == mirrored_pins_.end()) - || (!mirrored_only - && mirrored_pins_.find(io_pin.getBTerm()) - != mirrored_pins_.end())) { + if ((mirrored_only && !io_pin.getBTerm()->hasMirroredBTerm()) + || (!mirrored_only && io_pin.getBTerm()->hasMirroredBTerm())) { continue; } - if (io_pin.isMirrored() - && mirrored_pins_.find(io_pin.getBTerm()) == mirrored_pins_.end()) { + if (io_pin.isMirrored() && !io_pin.getBTerm()->hasMirroredBTerm()) { logger_->warn(PPL, 84, "Pin {} is mirrored with another pin. The constraint for " @@ -1949,10 +1927,10 @@ std::vector IOPlacer::findPinsForConstraint(const Constraint& constraint, void IOPlacer::initMirroredPins(bool annealing) { for (IOPin& io_pin : netlist_->getIOPins()) { - if (mirrored_pins_.find(io_pin.getBTerm()) != mirrored_pins_.end()) { + if (io_pin.getBTerm()->hasMirroredBTerm()) { int pin_idx = netlist_->getIoPinIdx(io_pin.getBTerm()); io_pin.setMirrored(); - odb::dbBTerm* mirrored_term = mirrored_pins_[io_pin.getBTerm()]; + odb::dbBTerm* mirrored_term = io_pin.getBTerm()->getMirroredBTerm(); int mirrored_pin_idx = netlist_->getIoPinIdx(mirrored_term); IOPin& mirrored_pin = netlist_->getIoPin(mirrored_pin_idx); mirrored_pin.setMirrored(); @@ -2197,8 +2175,7 @@ void IOPlacer::findPinAssignment(std::vector
& sections, } for (auto& match : hg_vec) { - match.getAssignmentForGroups( - assignment_, mirrored_pins_, mirrored_groups_only); + match.getAssignmentForGroups(assignment_, mirrored_groups_only); } for (auto& sec : sections) { @@ -2211,15 +2188,11 @@ void IOPlacer::findPinAssignment(std::vector
& sections, match.findAssignment(); } - if (!mirrored_pins_.empty()) { + for (bool mirrored_pins : {true, false}) { for (auto& match : hg_vec) { - match.getFinalAssignment(assignment_, mirrored_pins_, true); + match.getFinalAssignment(assignment_, mirrored_pins); } } - - for (auto& match : hg_vec) { - match.getFinalAssignment(assignment_, mirrored_pins_, false); - } } void IOPlacer::updateSlots() diff --git a/src/ppl/src/IOPlacer.i b/src/ppl/src/IOPlacer.i index a7657f457e9..7cf35635805 100644 --- a/src/ppl/src/IOPlacer.i +++ b/src/ppl/src/IOPlacer.i @@ -169,12 +169,6 @@ add_top_layer_constraint(PinSet *pin_list, getIOPlacer()->addTopLayerConstraint(pin_list, odb::Rect(x1, y1, x2, y2)); } -void -add_mirrored_pins(odb::dbBTerm* bterm1, odb::dbBTerm* bterm2) -{ - getIOPlacer()->addMirroredPins(bterm1, bterm2); -} - void set_hor_length(int length) { From 623fd7b9a7249a3958e1b0772f8bff80ba37103f Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Fri, 7 Mar 2025 17:03:55 -0300 Subject: [PATCH 08/12] ppl: remove constraint command Signed-off-by: Eder Monteiro --- src/ppl/README.md | 1 - src/ppl/src/IOPlacer.tcl | 133 --------------------------------------- 2 files changed, 134 deletions(-) diff --git a/src/ppl/README.md b/src/ppl/README.md index 60560af7be7..b975c0cde1d 100644 --- a/src/ppl/README.md +++ b/src/ppl/README.md @@ -313,7 +313,6 @@ If you are a developer, you might find these useful. More details can be found i | `parse_pin_names` | Parse pin names. | | `get_edge_extreme` | Get extremes of edge. | | `exclude_intervals` | Set exclude interval. | -| `add_pins_to_constraint` | Add pins to constrained region. | | `add_pins_to_top_layer` | Add pins to top layer. | ## Example scripts diff --git a/src/ppl/src/IOPlacer.tcl b/src/ppl/src/IOPlacer.tcl index 47357bfd037..860ac80fa4f 100644 --- a/src/ppl/src/IOPlacer.tcl +++ b/src/ppl/src/IOPlacer.tcl @@ -117,134 +117,6 @@ proc define_pin_shape_pattern { args } { ppl::create_pin_shape_pattern $layer $x_step $y_step region $width $height $keepout } -sta::define_cmd_args "set_io_pin_constraint" {[-direction direction] \ - [-pin_names names] \ - [-region region] \ - [-mirrored_pins pins] \ - [-group] - [-order]} - -proc set_io_pin_constraint { args } { - sta::parse_key_args "set_io_pin_constraint" args \ - keys {-direction -pin_names -region -mirrored_pins} \ - flags {-group -order} - - sta::check_argc_eq0 "set_io_pin_constraint" $args - - set dbTech [ord::get_db_tech] - set dbBlock [ord::get_db_block] - set lef_units [$dbTech getLefUnits] - - if { [info exists keys(-region)] && [info exists keys(-mirrored_pins)] } { - utl::error PPL 83 "Both -region and -mirrored_pins constraints not allowed." - } - - if { [info exists keys(-mirrored_pins)] && [info exists flags(-group)] } { - utl::error PPL 87 "Both -mirrored_pins and -group constraints not allowed." - } - - if { [info exists keys(-region)] } { - set region $keys(-region) - if { [regexp -all {(top|bottom|left|right):(.+)} $region - edge interval] } { - set edge_ [ppl::parse_edge "-region" $edge] - - if { [regexp -all {([0-9]+[.]*[0-9]*|[*]+)-([0-9]+[.]*[0-9]*|[*]+)} $interval - begin end] } { - if { $begin == "*" } { - set begin [ppl::get_edge_extreme "-region" 1 $edge] - } else { - set begin [ord::microns_to_dbu $begin] - } - - if { $end == "*" } { - set end [ppl::get_edge_extreme "-region" 0 $edge] - } else { - set end [ord::microns_to_dbu $end] - } - } elseif { $interval == "*" } { - set begin [ppl::get_edge_extreme "-region" 1 $edge] - set end [ppl::get_edge_extreme "-region" 0 $edge] - } - - if { [info exists keys(-direction)] && [info exists keys(-pin_names)] } { - utl::error PPL 16 "Both -direction and -pin_names constraints not allowed." - } - - if { [info exists keys(-direction)] } { - set direction $keys(-direction) - set dir [ppl::parse_direction "set_io_pin_constraint" $direction] - ppl::add_direction_constraint $dir $edge_ $begin $end - } - - if { [info exists keys(-pin_names)] } { - set names $keys(-pin_names) - ppl::add_pins_to_constraint "set_io_pin_constraint" $names $edge_ $begin $end $edge - } - } elseif { [regexp -all {(up):(.*)} $region - edge box] } { - if { $box == "*" } { - set die_area [$dbBlock getDieArea] - set llx [$die_area xMin] - set lly [$die_area yMin] - set urx [$die_area xMax] - set ury [$die_area yMax] - } elseif { - [regexp -all \ - {([0-9]+[.]*[0-9]*) ([0-9]+[.]*[0-9]*) ([0-9]+[.]*[0-9]*) ([0-9]+[.]*[0-9]*)} \ - $box - llx lly urx ury] - } { - set llx [ord::microns_to_dbu $llx] - set lly [ord::microns_to_dbu $lly] - set urx [ord::microns_to_dbu $urx] - set ury [ord::microns_to_dbu $ury] - } else { - utl::error PPL 59 "Box at top layer must have 4 values (llx lly urx ury)." - } - - if { [info exists keys(-pin_names)] } { - set names $keys(-pin_names) - ppl::add_pins_to_top_layer "set_io_pin_constraint" $names $llx $lly $urx $ury - } - } else { - utl::warn PPL 73 "Constraint with region $region has an invalid edge." - } - } - - if { [info exists flags(-group)] } { - if { [info exists keys(-pin_names)] } { - set group $keys(-pin_names) - } else { - utl::error PPL 58 "The -pin_names argument is required when using -group flag." - } - - set pin_list [ppl::parse_pin_names "place_pins -group_pins" $group] - if { [llength $pin_list] != 0 } { - ppl::add_pin_group $pin_list [info exists flags(-order)] - incr group_idx - } - } elseif { [info exists flags(-order)] } { - utl::error PPL 95 "-order cannot be used without -group." - } - - if { [info exists keys(-mirrored_pins)] } { - set mirrored_pins $keys(-mirrored_pins) - if { [llength $mirrored_pins] % 2 != 0 } { - utl::error PPL 81 "List of pins must have an even number of pins." - } - - foreach {pin1 pin2} $mirrored_pins { - set bterm1 [ppl::parse_pin_names "set_io_pin_constraint -mirrored_pins" $pin1] - set bterm2 [ppl::parse_pin_names "set_io_pin_constraint -mirrored_pins" $pin2] - ppl::add_mirrored_pins $bterm1 $bterm2 - } - } -} - -sta::define_cmd_args "clear_io_pin_constraints" {} - -proc clear_io_pin_constraints { args } { - sta::parse_key_args "clear_io_pin_constraints" args keys {} flags {} - ppl::clear_constraints -} - sta::define_cmd_args "set_pin_length" {[-hor_length h_length]\ [-ver_length v_length] } @@ -711,11 +583,6 @@ proc parse_layer_name { layer_name } { return $tech_layer } -proc add_pins_to_constraint { cmd names edge begin end edge_name } { - set pin_list [ppl::parse_pin_names $cmd $names] - ppl::add_names_constraint $pin_list $edge $begin $end -} - proc add_pins_to_top_layer { cmd names llx lly urx ury } { set tech [ord::get_db_tech] set top_layer [ppl::get_top_layer] From 73c039803d69bef23831c828d7c74882bfbd5f1d Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Fri, 7 Mar 2025 21:04:30 -0300 Subject: [PATCH 09/12] ppl: use IO constraints stored in ODB Signed-off-by: Eder Monteiro --- src/odb/src/db/dbBlock.cpp | 3 +- src/odb/src/db/odb.tcl | 125 ++++++++++++++++++++++++ src/ppl/include/ppl/IOPlacer.h | 10 +- src/ppl/src/IOPlacer.cpp | 106 +++++++++----------- src/ppl/src/IOPlacer.i | 12 --- src/ppl/src/Slots.cpp | 9 ++ src/ppl/src/Slots.h | 5 + src/ppl/test/add_constraint1.ok | 2 +- src/ppl/test/add_constraint10.ok | 4 +- src/ppl/test/add_constraint11.ok | 4 +- src/ppl/test/add_constraint12.ok | 6 +- src/ppl/test/add_constraint13.ok | 6 +- src/ppl/test/add_constraint14.ok | 4 +- src/ppl/test/add_constraint15.ok | 4 +- src/ppl/test/add_constraint16.ok | 5 +- src/ppl/test/add_constraint2.ok | 2 +- src/ppl/test/add_constraint3.ok | 2 +- src/ppl/test/add_constraint4.ok | 2 +- src/ppl/test/add_constraint5.ok | 9 +- src/ppl/test/add_constraint5.tcl | 5 +- src/ppl/test/add_constraint6.ok | 8 +- src/ppl/test/add_constraint6.tcl | 3 +- src/ppl/test/add_constraint7.ok | 2 +- src/ppl/test/add_constraint8.ok | 4 +- src/ppl/test/add_constraint9.defok | 28 +++--- src/ppl/test/add_constraint9.ok | 2 +- src/ppl/test/add_constraint_debug.ok | 7 +- src/ppl/test/add_constraint_error3.ok | 1 - src/ppl/test/add_constraint_error5.ok | 1 - src/ppl/test/add_constraint_error7.ok | 2 +- src/ppl/test/add_constraint_error8.ok | 2 +- src/ppl/test/add_constraint_error9.ok | 2 +- src/ppl/test/annealing_constraint1.ok | 4 +- src/ppl/test/annealing_constraint2.ok | 4 +- src/ppl/test/annealing_constraint3.ok | 4 +- src/ppl/test/annealing_constraint4.ok | 4 +- src/ppl/test/annealing_constraint5.ok | 4 +- src/ppl/test/annealing_constraint6.ok | 6 +- src/ppl/test/annealing_constraint7.ok | 6 +- src/ppl/test/annealing_constraint8.ok | 8 +- src/ppl/test/annealing_large_groups1.ok | 2 +- src/ppl/test/annealing_large_groups2.ok | 2 +- src/ppl/test/annealing_mirrored3.ok | 2 +- src/ppl/test/annealing_mirrored4.ok | 4 +- src/ppl/test/annealing_mirrored5.ok | 4 +- src/ppl/test/cells_not_placed.ok | 4 +- src/ppl/test/group_pins10.ok | 7 +- src/ppl/test/group_pins12.defok | 8 +- src/ppl/test/group_pins12.ok | 10 +- src/ppl/test/group_pins4.ok | 8 +- src/ppl/test/group_pins6.ok | 8 +- src/ppl/test/group_pins7.ok | 8 +- src/ppl/test/group_pins8.ok | 2 +- src/ppl/test/group_pins9.ok | 2 +- src/ppl/test/group_pins_warn1.ok | 2 +- src/ppl/test/large_groups1.ok | 2 +- src/ppl/test/large_groups2.ok | 2 +- src/ppl/test/large_groups3.ok | 5 +- src/ppl/test/large_groups4.ok | 6 +- src/ppl/test/ppl_aux.py | 12 ++- src/ppl/test/random3.ok | 4 +- src/ppl/test/random4.ok | 4 +- src/ppl/test/random8.ok | 10 +- src/ppl/test/random8.tcl | 3 +- src/ppl/test/random9.ok | 2 +- src/ppl/test/write_pin_placement1.ok | 6 +- src/ppl/test/write_pin_placement2.ok | 2 +- src/ppl/test/write_pin_placement3.ok | 4 +- src/ppl/test/write_pin_placement4.ok | 4 +- 69 files changed, 328 insertions(+), 238 deletions(-) diff --git a/src/odb/src/db/dbBlock.cpp b/src/odb/src/db/dbBlock.cpp index 21ca3177d31..1c6a9824b69 100644 --- a/src/odb/src/db/dbBlock.cpp +++ b/src/odb/src/db/dbBlock.cpp @@ -1669,7 +1669,8 @@ void dbBlock::addBTermNamesConstraint(const std::vector& bterms, const Rect& constraint_region) { for (dbBTerm* bterm : bterms) { - if (bterm->getConstraintRegion()) { + const auto& bterm_constraint = bterm->getConstraintRegion(); + if (bterm_constraint && bterm_constraint.value() != constraint_region) { getImpl()->getLogger()->error( utl::ODB, 239, diff --git a/src/odb/src/db/odb.tcl b/src/odb/src/db/odb.tcl index fdb055c2a25..d8ae887609e 100644 --- a/src/odb/src/db/odb.tcl +++ b/src/odb/src/db/odb.tcl @@ -676,6 +676,131 @@ proc design_is_routed { args } { set block [$chip getBlock] return [$block designIsRouted [info exists flags(-verbose)]] +} + +sta::define_cmd_args "set_io_pin_constraint" {[-direction direction] \ + [-pin_names names] \ + [-region region] \ + [-mirrored_pins pins] \ + [-group] + [-order]} + +proc set_io_pin_constraint { args } { + sta::parse_key_args "set_io_pin_constraint" args \ + keys {-direction -pin_names -region -mirrored_pins} \ + flags {-group -order} + + sta::check_argc_eq0 "set_io_pin_constraint" $args + + set tech [ord::get_db_tech] + set block [ord::get_db_block] + set lef_units [$tech getLefUnits] + + if { [info exists keys(-region)] && [info exists keys(-mirrored_pins)] } { + utl::error PPL 83 "Both -region and -mirrored_pins constraints not allowed." + } + + if { [info exists keys(-mirrored_pins)] && [info exists flags(-group)] } { + utl::error PPL 87 "Both -mirrored_pins and -group constraints not allowed." + } + + if { [info exists keys(-region)] } { + set region $keys(-region) + if { [regexp -all {(top|bottom|left|right):(.+)} $region - edge interval] } { + if { [regexp -all {([0-9]+[.]*[0-9]*|[*]+)-([0-9]+[.]*[0-9]*|[*]+)} $interval - begin end] } { + if { $begin == "*" } { + set begin [ppl::get_edge_extreme "-region" 1 $edge] + } else { + set begin [ord::microns_to_dbu $begin] + } + + if { $end == "*" } { + set end [ppl::get_edge_extreme "-region" 0 $edge] + } else { + set end [ord::microns_to_dbu $end] + } + } elseif { $interval == "*" } { + set begin [ppl::get_edge_extreme "-region" 1 $edge] + set end [ppl::get_edge_extreme "-region" 0 $edge] + } + + if { [info exists keys(-direction)] && [info exists keys(-pin_names)] } { + utl::error PPL 16 "Both -direction and -pin_names constraints not allowed." + } + + if { [info exists keys(-direction)] } { + set direction $keys(-direction) + odb::add_direction_constraint $direction $edge $begin $end + } + + if { [info exists keys(-pin_names)] } { + set names $keys(-pin_names) + odb::add_names_constraint $names $edge $begin $end + } + } elseif { [regexp -all {(up):(.*)} $region - edge box] } { + if { $box == "*" } { + set die_area [$block getDieArea] + set llx [$die_area xMin] + set lly [$die_area yMin] + set urx [$die_area xMax] + set ury [$die_area yMax] + } elseif { + [regexp -all \ + {([0-9]+[.]*[0-9]*) ([0-9]+[.]*[0-9]*) ([0-9]+[.]*[0-9]*) ([0-9]+[.]*[0-9]*)} \ + $box - llx lly urx ury] + } { + set llx [ord::microns_to_dbu $llx] + set lly [ord::microns_to_dbu $lly] + set urx [ord::microns_to_dbu $urx] + set ury [ord::microns_to_dbu $ury] + } else { + utl::error PPL 59 "Box at top layer must have 4 values (llx lly urx ury)." + } + + if { [info exists keys(-pin_names)] } { + set names $keys(-pin_names) + ppl::add_pins_to_top_layer "set_io_pin_constraint" $names $llx $lly $urx $ury + } + } else { + utl::warn PPL 73 "Constraint with region $region has an invalid edge." + } + } + + if { [info exists flags(-group)] } { + if { [info exists keys(-pin_names)] } { + set group $keys(-pin_names) + } else { + utl::error PPL 58 "The -pin_names argument is required when using -group flag." + } + + set pin_list [ppl::parse_pin_names "place_pins -group_pins" $group] + if { [llength $pin_list] != 0 } { + odb::add_pin_group $pin_list [info exists flags(-order)] + } + } elseif { [info exists flags(-order)] } { + utl::error PPL 95 "-order cannot be used without -group." + } + + if { [info exists keys(-mirrored_pins)] } { + set mirrored_pins $keys(-mirrored_pins) + if { [llength $mirrored_pins] % 2 != 0 } { + utl::error PPL 81 "List of pins must have an even number of pins." + } + + foreach {pin1 pin2} $mirrored_pins { + set bterm1 [ppl::parse_pin_names "set_io_pin_constraint -mirrored_pins" $pin1] + set bterm2 [ppl::parse_pin_names "set_io_pin_constraint -mirrored_pins" $pin2] + odb::add_mirrored_pins $bterm1 $bterm2 + } + } +} + +sta::define_cmd_args "clear_io_pin_constraints" {} + +proc clear_io_pin_constraints { args } { + sta::parse_key_args "clear_io_pin_constraints" args keys {} flags {} + ppl::clear_constraints +} namespace eval odb { diff --git a/src/ppl/include/ppl/IOPlacer.h b/src/ppl/include/ppl/IOPlacer.h index 90769061ff1..9f3d1f1f3a4 100644 --- a/src/ppl/include/ppl/IOPlacer.h +++ b/src/ppl/include/ppl/IOPlacer.h @@ -124,11 +124,6 @@ class IOPlacer Parameters* getParameters() { return parms_.get(); } int64 computeIONetsHPWL(); void excludeInterval(Edge edge, int begin, int end); - void addNamesConstraint(PinSet* pins, Edge edge, int begin, int end); - void addDirectionConstraint(Direction direction, - Edge edge, - int begin, - int end); void addTopLayerConstraint(PinSet* pins, const odb::Rect& region); void addHorLayer(odb::dbTechLayer* layer); void addVerLayer(odb::dbTechLayer* layer); @@ -188,8 +183,7 @@ class IOPlacer bool is_group); std::string getSlotsLocation(Edge edge, bool top_layer); int placeFallbackPins(bool random); - void assignMirroredPins(IOPin& io_pin, - std::vector& assignment); + void assignMirroredPins(IOPin& io_pin, std::vector& assignment); int getSlotIdxByPosition(const odb::Point& position, int layer, std::vector& slots); @@ -213,6 +207,8 @@ class IOPlacer std::vector
createSectionsPerConstraint(Constraint& constraint); void getPinsFromDirectionConstraint(Constraint& constraint); void initMirroredPins(bool annealing = false); + Interval findIntervalFromRect(const odb::Rect& rect); + void getConstraintsFromDB(); void initConstraints(bool annealing = false); void sortConstraints(); void checkPinsInMultipleConstraints(); diff --git a/src/ppl/src/IOPlacer.cpp b/src/ppl/src/IOPlacer.cpp index 68c70e905e3..12560925fe1 100644 --- a/src/ppl/src/IOPlacer.cpp +++ b/src/ppl/src/IOPlacer.cpp @@ -1775,64 +1775,6 @@ void IOPlacer::excludeInterval(Interval interval) excluded_intervals_.push_back(interval); } -void IOPlacer::addNamesConstraint(PinSet* pins, Edge edge, int begin, int end) -{ - Interval interval(edge, begin, end); - bool inserted = false; - std::string pin_names = getPinSetOrListString(*pins); - - if (logger_->debugCheck(utl::PPL, "pin_groups", 1)) { - debugPrint(logger_, - utl::PPL, - "pin_groups", - 1, - "Restrict pins [ {} ] to region {:.2f}u-{:.2f}u at the {} edge.", - pin_names, - getBlock()->dbuToMicrons(begin), - getBlock()->dbuToMicrons(end), - getEdgeString(edge)); - } else { - logger_->info( - utl::PPL, - 48, - "Restrict pins [ {} ] to region {:.2f}u-{:.2f}u at the {} edge.", - pin_names, - getBlock()->dbuToMicrons(begin), - getBlock()->dbuToMicrons(end), - getEdgeString(edge)); - } - - for (Constraint& constraint : constraints_) { - if (constraint.interval == interval) { - constraint.pin_list.insert(pins->begin(), pins->end()); - inserted = true; - break; - } - } - - if (!inserted) { - constraints_.emplace_back(*pins, Direction::invalid, interval); - } -} - -void IOPlacer::addDirectionConstraint(Direction direction, - Edge edge, - int begin, - int end) -{ - Interval interval(edge, begin, end); - logger_->info(utl::PPL, - 67, - "Restrict {} pins to region {:.2f}u-{:.2f}u, in the {} edge.", - getDirectionString(direction), - getBlock()->dbuToMicrons(begin), - getBlock()->dbuToMicrons(end), - getEdgeString(edge)); - - Constraint constraint(PinSet(), direction, interval); - constraints_.push_back(constraint); -} - void IOPlacer::addTopLayerConstraint(PinSet* pins, const odb::Rect& region) { Constraint constraint(*pins, Direction::invalid, region); @@ -1940,9 +1882,55 @@ void IOPlacer::initMirroredPins(bool annealing) } } +Interval IOPlacer::findIntervalFromRect(const odb::Rect& rect) +{ + int begin; + int end; + Edge edge; + + const odb::Rect die_area = getBlock()->getDieArea(); + if (rect.xMin() == rect.xMax()) { + begin = rect.yMin(); + end = rect.yMax(); + edge = die_area.xMin() == rect.xMin() ? Edge::left : Edge::right; + } else { + begin = rect.xMin(); + end = rect.xMax(); + edge = die_area.yMin() == rect.yMin() ? Edge::bottom : Edge::top; + } + + return Interval(edge, begin, end); +} + +void IOPlacer::getConstraintsFromDB() +{ + std::unordered_map pins_per_interval; + for (odb::dbBTerm* bterm : getBlock()->getBTerms()) { + auto constraint_region = bterm->getConstraintRegion(); + if (constraint_region) { + Interval interval = findIntervalFromRect(constraint_region.value()); + pins_per_interval[interval].insert(bterm); + } + } + + for (const auto& [interval, pins] : pins_per_interval) { + std::string pin_names = getPinSetOrListString(pins); + logger_->info( + utl::PPL, + 67, + "Restrict pins [ {} ] to region {:.2f}u-{:.2f}u at the {} edge.", + pin_names, + getBlock()->dbuToMicrons(interval.getBegin()), + getBlock()->dbuToMicrons(interval.getEnd()), + getEdgeString(interval.getEdge())); + constraints_.push_back( + Constraint(std::move(pins), Direction::invalid, interval)); + } +} + void IOPlacer::initConstraints(bool annealing) { - std::reverse(constraints_.begin(), constraints_.end()); + getConstraintsFromDB(); int constraint_idx = 0; int constraints_no_slots = 0; for (Constraint& constraint : constraints_) { diff --git a/src/ppl/src/IOPlacer.i b/src/ppl/src/IOPlacer.i index 7cf35635805..3f714d9d8a3 100644 --- a/src/ppl/src/IOPlacer.i +++ b/src/ppl/src/IOPlacer.i @@ -149,18 +149,6 @@ exclude_interval(Edge edge, int begin, int end) getIOPlacer()->excludeInterval(edge, begin, end); } -void -add_names_constraint(PinSet *pin_list, Edge edge, int begin, int end) -{ - getIOPlacer()->addNamesConstraint(pin_list, edge, begin, end); -} - -void add_direction_constraint(Direction direction, Edge edge, - int begin, int end) -{ - getIOPlacer()->addDirectionConstraint(direction, edge, begin, end); -} - void add_top_layer_constraint(PinSet *pin_list, int x1, int y1, diff --git a/src/ppl/src/Slots.cpp b/src/ppl/src/Slots.cpp index a0512c48915..10d0c6ee55e 100644 --- a/src/ppl/src/Slots.cpp +++ b/src/ppl/src/Slots.cpp @@ -35,6 +35,7 @@ #include "Slots.h" +#include #include namespace ppl { @@ -66,4 +67,12 @@ bool Interval::operator==(const Interval& interval) const && end_ == interval.getEnd() && layer_ == interval.getLayer(); } +std::size_t IntervalHash::operator()(const Interval& interval) const +{ + return boost::hash>()({interval.getEdge(), + interval.getBegin(), + interval.getEnd(), + interval.getLayer()}); +} + } // namespace ppl \ No newline at end of file diff --git a/src/ppl/src/Slots.h b/src/ppl/src/Slots.h index b56d38cb9e1..5a5423f97f2 100644 --- a/src/ppl/src/Slots.h +++ b/src/ppl/src/Slots.h @@ -67,6 +67,11 @@ class Interval int layer_; }; +struct IntervalHash +{ + std::size_t operator()(const Interval& interval) const; +}; + struct TopLayerGrid { int layer = -1; diff --git a/src/ppl/test/add_constraint1.ok b/src/ppl/test/add_constraint1.ok index 4360b2fb91f..7c68dc277af 100644 --- a/src/ppl/test/add_constraint1.ok +++ b/src/ppl/test/add_constraint1.ok @@ -3,8 +3,8 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint10.ok b/src/ppl/test/add_constraint10.ok index 866e331ae46..73d5d21d194 100644 --- a/src/ppl/test/add_constraint10.ok +++ b/src/ppl/test/add_constraint10.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ clk resp_msg[13] resp_msg[12] resp_msg[11] resp_msg[10] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ req_msg[13] req_msg[12] req_msg[11] req_msg[10] req_rdy ... ] to region 0.00u-18.00u at the TOP edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ req_msg[13] req_msg[12] req_msg[11] req_msg[10] req_rdy ... ] to region 0.00u-18.00u at the TOP edge. +[INFO PPL-0067] Restrict pins [ clk resp_msg[13] resp_msg[12] resp_msg[11] resp_msg[10] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint11.ok b/src/ppl/test/add_constraint11.ok index bf56ed3df34..60170d3211b 100644 --- a/src/ppl/test/add_constraint11.ok +++ b/src/ppl/test/add_constraint11.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ clk resp_msg[12] resp_msg[11] resp_msg[10] resp_msg[1] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0044] Pin group: [ resp_msg[0] resp_msg[1] clk resp_val resp_rdy ... ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ resp_msg[0] resp_msg[1] clk resp_val resp_rdy ... ] +[INFO PPL-0067] Restrict pins [ clk resp_msg[12] resp_msg[11] resp_msg[10] resp_msg[1] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint12.ok b/src/ppl/test/add_constraint12.ok index 7a88f2c5456..2f4d9babac6 100644 --- a/src/ppl/test/add_constraint12.ok +++ b/src/ppl/test/add_constraint12.ok @@ -3,11 +3,11 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_val resp_msg[14] resp_msg[3] resp_msg[2] ] to region 0.00u-18.00u at the TOP edge. -[INFO PPL-0048] Restrict pins [ req_msg[13] req_msg[12] req_msg[11] req_msg[10] req_rdy ... ] to region 0.00u-18.00u at the BOTTOM edge. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ resp_msg[3] resp_msg[2] resp_msg[14] req_val ] [INFO PPL-0044] Pin group: [ req_rdy req_msg[10] req_msg[11] req_msg[12] req_msg[13] ... ] -Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ req_val resp_msg[14] resp_msg[3] resp_msg[2] ] to region 0.00u-18.00u at the TOP edge. +[INFO PPL-0067] Restrict pins [ req_msg[13] req_msg[12] req_msg[11] req_msg[10] req_rdy ... ] to region 0.00u-18.00u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint13.ok b/src/ppl/test/add_constraint13.ok index 9e9de2d5eea..3643eeaa4d0 100644 --- a/src/ppl/test/add_constraint13.ok +++ b/src/ppl/test/add_constraint13.ok @@ -3,11 +3,11 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_val resp_msg[14] resp_msg[3] resp_msg[2] ] to region 0.00u-18.00u at the TOP edge. -[INFO PPL-0048] Restrict pins [ req_msg[13] req_msg[12] req_msg[11] req_msg[10] req_rdy ... ] to region 0.00u-18.00u at the BOTTOM edge. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ resp_msg[3] resp_msg[2] resp_msg[14] req_val ] [INFO PPL-0044] Pin group: [ req_rdy req_msg[10] req_msg[11] req_msg[12] req_msg[13] ... ] -Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ req_val resp_msg[14] resp_msg[3] resp_msg[2] ] to region 0.00u-18.00u at the TOP edge. +[INFO PPL-0067] Restrict pins [ req_msg[13] req_msg[12] req_msg[11] req_msg[10] req_rdy ... ] to region 0.00u-18.00u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint14.ok b/src/ppl/test/add_constraint14.ok index bf56ed3df34..60170d3211b 100644 --- a/src/ppl/test/add_constraint14.ok +++ b/src/ppl/test/add_constraint14.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ clk resp_msg[12] resp_msg[11] resp_msg[10] resp_msg[1] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0044] Pin group: [ resp_msg[0] resp_msg[1] clk resp_val resp_rdy ... ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ resp_msg[0] resp_msg[1] clk resp_val resp_rdy ... ] +[INFO PPL-0067] Restrict pins [ clk resp_msg[12] resp_msg[11] resp_msg[10] resp_msg[1] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint15.ok b/src/ppl/test/add_constraint15.ok index 5edf12a496b..919fc55684f 100644 --- a/src/ppl/test/add_constraint15.ok +++ b/src/ppl/test/add_constraint15.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 1008 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint16.ok b/src/ppl/test/add_constraint16.ok index 5737aa7d0c8..7b3807834e3 100644 --- a/src/ppl/test/add_constraint16.ok +++ b/src/ppl/test/add_constraint16.ok @@ -3,11 +3,10 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] -[INFO PPL-0048] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0044] Pin group: [ resp_msg[0] resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] ... ] -Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 1008 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint2.ok b/src/ppl/test/add_constraint2.ok index 091f86b4a0d..4ab32027762 100644 --- a/src/ppl/test/add_constraint2.ok +++ b/src/ppl/test/add_constraint2.ok @@ -3,8 +3,8 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the BOTTOM edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint3.ok b/src/ppl/test/add_constraint3.ok index 4c58eb6bf40..6b0545e4d39 100644 --- a/src/ppl/test/add_constraint3.ok +++ b/src/ppl/test/add_constraint3.ok @@ -3,8 +3,8 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the LEFT edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-100.80u at the LEFT edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint4.ok b/src/ppl/test/add_constraint4.ok index ca8854bdade..b7e14460a2b 100644 --- a/src/ppl/test/add_constraint4.ok +++ b/src/ppl/test/add_constraint4.ok @@ -3,8 +3,8 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the RIGHT edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-100.80u at the RIGHT edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint5.ok b/src/ppl/test/add_constraint5.ok index c201c1e1db5..89610773e53 100644 --- a/src/ppl/test/add_constraint5.ok +++ b/src/ppl/test/add_constraint5.ok @@ -3,10 +3,5 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the RIGHT edge. -[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.80u, in the LEFT edge. -[INFO PPL-0048] Restrict pins [ req_rdy req_val resp_rdy resp_val ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ req_msg[15] req_msg[14] resp_msg[15] resp_msg[14] ] to region 0.00u-100.13u at the TOP edge. -Found 0 macro blocks. -[ERROR PPL-0098] Pins req_msg[15] req_msg[14] req_rdy req_val resp_msg[15] resp_msg[14] resp_rdy resp_val are assigned to multiple constraints. -PPL-0098 +[ERROR ODB-0239] Pin resp_val is assigned to multiple constraints. +ODB-0239 diff --git a/src/ppl/test/add_constraint5.tcl b/src/ppl/test/add_constraint5.tcl index b4f52e72c4a..aacba5a3f93 100644 --- a/src/ppl/test/add_constraint5.tcl +++ b/src/ppl/test/add_constraint5.tcl @@ -5,7 +5,6 @@ read_def gcd.def set_io_pin_constraint -direction INPUT -region right:* set_io_pin_constraint -direction OUTPUT -region left:* -set_io_pin_constraint -pin_names {resp_val resp_rdy req_rdy req_val} -region bottom:* -set_io_pin_constraint -pin_names {req_msg[15] req_msg[14] resp_msg[15] resp_msg[14]} -region top:* -catch {place_pins -hor_layers metal3 -ver_layers metal2 -corner_avoidance 0 -min_distance 0.12} error +catch {set_io_pin_constraint -pin_names {resp_val resp_rdy req_rdy req_val} -region bottom:*} error + puts $error diff --git a/src/ppl/test/add_constraint6.ok b/src/ppl/test/add_constraint6.ok index 568e489327a..2fabfdd3d42 100644 --- a/src/ppl/test/add_constraint6.ok +++ b/src/ppl/test/add_constraint6.ok @@ -3,9 +3,5 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ req_msg[15] req_msg[14] resp_msg[15] resp_msg[14] ] to region 0.00u-100.13u at the TOP edge. -Found 0 macro blocks. -Using 2 tracks default min distance between IO pins. -[ERROR PPL-0098] Pins req_msg[15] req_msg[14] are assigned to multiple constraints. -PPL-0098 +[ERROR ODB-0239] Pin req_msg[15] is assigned to multiple constraints. +ODB-0239 diff --git a/src/ppl/test/add_constraint6.tcl b/src/ppl/test/add_constraint6.tcl index 98f728ecb83..77cc78e5f4f 100644 --- a/src/ppl/test/add_constraint6.tcl +++ b/src/ppl/test/add_constraint6.tcl @@ -4,7 +4,6 @@ read_lef Nangate45/Nangate45.lef read_def gcd.def set_io_pin_constraint -pin_names {resp_val resp_rdy req_rdy req_val req_msg*} -region bottom:* -set_io_pin_constraint -pin_names {req_msg[15] req_msg[14] resp_msg[15] resp_msg[14]} -region top:* +catch {set_io_pin_constraint -pin_names {req_msg[15] req_msg[14] resp_msg[15] resp_msg[14]} -region top:*} error -catch {place_pins -hor_layers metal3 -ver_layers metal2 -random} error puts $error diff --git a/src/ppl/test/add_constraint7.ok b/src/ppl/test/add_constraint7.ok index e6b38e56584..887b57aa2d1 100644 --- a/src/ppl/test/add_constraint7.ok +++ b/src/ppl/test/add_constraint7.ok @@ -3,8 +3,8 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0007] Random pin placement. No differences found. diff --git a/src/ppl/test/add_constraint8.ok b/src/ppl/test/add_constraint8.ok index 30acfb2809c..85117a60aeb 100644 --- a/src/ppl/test/add_constraint8.ok +++ b/src/ppl/test/add_constraint8.ok @@ -3,10 +3,10 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-18.00u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 10.00u-20.00u at the BOTTOM edge. Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 10.00u-20.00u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-18.00u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 1220 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint9.defok b/src/ppl/test/add_constraint9.defok index 76e70f2bdee..8fb9731292e 100644 --- a/src/ppl/test/add_constraint9.defok +++ b/src/ppl/test/add_constraint9.defok @@ -122,7 +122,7 @@ PINS 54 ; - req_msg[0] + NET req_msg[0] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 200190 163940 ) N ; + + PLACED ( 200190 141540 ) N ; - req_msg[10] + NET req_msg[10] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) @@ -165,8 +165,8 @@ PINS 54 ; + PLACED ( 140030 201530 ) N ; - req_msg[1] + NET req_msg[1] + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 200190 149660 ) N ; + + LAYER metal2 ( -70 -70 ) ( 70 70 ) + + PLACED ( 74290 70 ) N ; - req_msg[20] + NET req_msg[20] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) @@ -209,8 +209,8 @@ PINS 54 ; + PLACED ( 88730 70 ) N ; - req_msg[2] + NET req_msg[2] + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 200190 135940 ) N ; + + LAYER metal2 ( -70 -70 ) ( 70 70 ) + + PLACED ( 151050 201530 ) N ; - req_msg[30] + NET req_msg[30] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) @@ -221,8 +221,8 @@ PINS 54 ; + PLACED ( 165490 201530 ) N ; - req_msg[3] + NET req_msg[3] + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal2 ( -70 -70 ) ( 70 70 ) - + PLACED ( 165110 201530 ) N ; + + LAYER metal3 ( -70 -70 ) ( 70 70 ) + + PLACED ( 70 175140 ) N ; - req_msg[4] + NET req_msg[4] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) @@ -262,7 +262,7 @@ PINS 54 ; - resp_msg[0] + NET resp_msg[0] + DIRECTION OUTPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 70 163940 ) N ; + + PLACED ( 70 141540 ) N ; - resp_msg[10] + NET resp_msg[10] + DIRECTION OUTPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) @@ -289,16 +289,16 @@ PINS 54 ; + PLACED ( 70 26460 ) N ; - resp_msg[1] + NET resp_msg[1] + DIRECTION OUTPUT + USE SIGNAL + PORT - + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 70 149660 ) N ; + + LAYER metal2 ( -70 -70 ) ( 70 70 ) + + PLACED ( 74290 201530 ) N ; - resp_msg[2] + NET resp_msg[2] + DIRECTION OUTPUT + USE SIGNAL + PORT - + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 70 135940 ) N ; + + LAYER metal2 ( -70 -70 ) ( 70 70 ) + + PLACED ( 151050 70 ) N ; - resp_msg[3] + NET resp_msg[3] + DIRECTION OUTPUT + USE SIGNAL + PORT - + LAYER metal2 ( -70 -70 ) ( 70 70 ) - + PLACED ( 165110 70 ) N ; + + LAYER metal3 ( -70 -70 ) ( 70 70 ) + + PLACED ( 200190 175140 ) N ; - resp_msg[4] + NET resp_msg[4] + DIRECTION OUTPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) diff --git a/src/ppl/test/add_constraint9.ok b/src/ppl/test/add_constraint9.ok index f40c3cdc047..94c275d798d 100644 --- a/src/ppl/test/add_constraint9.ok +++ b/src/ppl/test/add_constraint9.ok @@ -10,5 +10,5 @@ Found 0 macro blocks. [INFO PPL-0004] Number of I/O w/o sink 0 [INFO PPL-0005] Slots per section 200 [INFO PPL-0008] Successfully assigned pins to sections. -[INFO PPL-0012] I/O nets HPWL: 987.97 um. +[INFO PPL-0012] I/O nets HPWL: 1009.01 um. No differences found. diff --git a/src/ppl/test/add_constraint_debug.ok b/src/ppl/test/add_constraint_debug.ok index 5d76164807d..091c50ac5e8 100644 --- a/src/ppl/test/add_constraint_debug.ok +++ b/src/ppl/test/add_constraint_debug.ok @@ -3,11 +3,10 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[DEBUG PPL-pin_groups] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] req_msg[26] req_msg[25] req_msg[24] req_msg[23] req_msg[22] req_msg[21] req_msg[20] req_msg[19] req_msg[18] req_msg[17] req_msg[16] req_msg[15] req_msg[14] req_msg[13] req_msg[12] req_msg[11] req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] req_msg[5] req_msg[4] req_msg[3] req_msg[2] req_msg[1] req_msg[0] ] to region 0.00u-100.13u at the BOTTOM edge. -[DEBUG PPL-pin_groups] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] req_msg[5] req_msg[6] req_msg[7] req_msg[8] req_msg[9] req_msg[10] req_msg[11] req_msg[12] req_msg[13] req_msg[14] req_msg[15] req_msg[16] req_msg[17] req_msg[18] req_msg[19] req_msg[20] req_msg[21] req_msg[22] req_msg[23] req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] req_msg[29] req_msg[30] req_msg[31] ] -[DEBUG PPL-pin_groups] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] resp_msg[10] resp_msg[9] resp_msg[8] resp_msg[7] resp_msg[6] resp_msg[5] resp_msg[4] resp_msg[3] resp_msg[2] resp_msg[1] resp_msg[0] ] to region 0.00u-100.13u at the BOTTOM edge. -[DEBUG PPL-pin_groups] Pin group: [ resp_msg[0] resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] resp_msg[5] resp_msg[6] resp_msg[7] resp_msg[8] resp_msg[9] resp_msg[10] resp_msg[11] resp_msg[12] resp_msg[13] resp_msg[14] resp_msg[15] ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] req_msg[5] req_msg[6] req_msg[7] req_msg[8] req_msg[9] req_msg[10] req_msg[11] req_msg[12] req_msg[13] req_msg[14] req_msg[15] req_msg[16] req_msg[17] req_msg[18] req_msg[19] req_msg[20] req_msg[21] req_msg[22] req_msg[23] req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] req_msg[29] req_msg[30] req_msg[31] ] +[INFO PPL-0044] Pin group: [ resp_msg[0] resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] resp_msg[5] resp_msg[6] resp_msg[7] resp_msg[8] resp_msg[9] resp_msg[10] resp_msg[11] resp_msg[12] resp_msg[13] resp_msg[14] resp_msg[15] ] +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] req_msg[26] req_msg[25] req_msg[24] req_msg[23] req_msg[22] req_msg[21] req_msg[20] req_msg[19] req_msg[18] req_msg[17] req_msg[16] req_msg[15] req_msg[14] req_msg[13] req_msg[12] req_msg[11] req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] req_msg[5] req_msg[4] req_msg[3] req_msg[2] req_msg[1] req_msg[0] resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] resp_msg[10] resp_msg[9] resp_msg[8] resp_msg[7] resp_msg[6] resp_msg[5] resp_msg[4] resp_msg[3] resp_msg[2] resp_msg[1] resp_msg[0] ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 1008 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/add_constraint_error3.ok b/src/ppl/test/add_constraint_error3.ok index 30adcbadb2c..237236104f5 100644 --- a/src/ppl/test/add_constraint_error3.ok +++ b/src/ppl/test/add_constraint_error3.ok @@ -3,6 +3,5 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge. [ERROR PPL-0058] The -pin_names argument is required when using -group flag. PPL-0058 diff --git a/src/ppl/test/add_constraint_error5.ok b/src/ppl/test/add_constraint_error5.ok index bb0e085946a..c52e83d5412 100644 --- a/src/ppl/test/add_constraint_error5.ok +++ b/src/ppl/test/add_constraint_error5.ok @@ -3,6 +3,5 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_val resp_msg[14] resp_msg[3] resp_msg[2] ] to region 0.00u-100.13u at the TOP edge. [ERROR PPL-0095] -order cannot be used without -group. PPL-0095 diff --git a/src/ppl/test/add_constraint_error7.ok b/src/ppl/test/add_constraint_error7.ok index 0f6c94f74d8..dd89330cd2e 100644 --- a/src/ppl/test/add_constraint_error7.ok +++ b/src/ppl/test/add_constraint_error7.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 10.00u-30.00u at the TOP edge. Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 10.00u-30.00u at the TOP edge. [WARNING PPL-0110] Constraint has 54 pins, but only 52 available slots. Increase the region 10.00um-30.00um on the TOP edge to 10.00um-30.52um. [ERROR PPL-0111] 1 constraint(s) does not have available slots for the pins. diff --git a/src/ppl/test/add_constraint_error8.ok b/src/ppl/test/add_constraint_error8.ok index d5305e47c70..b599df750ba 100644 --- a/src/ppl/test/add_constraint_error8.ok +++ b/src/ppl/test/add_constraint_error8.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 80.00u-100.00u at the TOP edge. Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 80.00u-100.00u at the TOP edge. [WARNING PPL-0110] Constraint has 54 pins, but only 50 available slots. Increase the region 80.00um-100.00um on the TOP edge to 78.61um-100.00um. [ERROR PPL-0111] 1 constraint(s) does not have available slots for the pins. diff --git a/src/ppl/test/add_constraint_error9.ok b/src/ppl/test/add_constraint_error9.ok index 28122f35436..1ea53004573 100644 --- a/src/ppl/test/add_constraint_error9.ok +++ b/src/ppl/test/add_constraint_error9.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-20.00u at the TOP edge. Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-20.00u at the TOP edge. [WARNING PPL-0110] Constraint has 54 pins, but only 50 available slots. Increase the region 0.00um-20.00um on the TOP edge to 0.00um-21.52um. [ERROR PPL-0111] 1 constraint(s) does not have available slots for the pins. diff --git a/src/ppl/test/annealing_constraint1.ok b/src/ppl/test/annealing_constraint1.ok index 0045198e193..0de9be422c3 100644 --- a/src/ppl/test/annealing_constraint1.ok +++ b/src/ppl/test/annealing_constraint1.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge. -[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the BOTTOM edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ req_rdy resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] ... ] to region 0.00u-100.13u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_constraint2.ok b/src/ppl/test/annealing_constraint2.ok index 5bacdd57969..9e1ca0411df 100644 --- a/src/ppl/test/annealing_constraint2.ok +++ b/src/ppl/test/annealing_constraint2.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the BOTTOM edge. -[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the TOP edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ req_rdy resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] ... ] to region 0.00u-100.13u at the TOP edge. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_constraint3.ok b/src/ppl/test/annealing_constraint3.ok index 501cb3bdd9b..accce4e1b97 100644 --- a/src/ppl/test/annealing_constraint3.ok +++ b/src/ppl/test/annealing_constraint3.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the LEFT edge. -[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.80u, in the RIGHT edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ req_rdy resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] ... ] to region 0.00u-100.80u at the RIGHT edge. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-100.80u at the LEFT edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_constraint4.ok b/src/ppl/test/annealing_constraint4.ok index 9f83a34e560..e1f63d31459 100644 --- a/src/ppl/test/annealing_constraint4.ok +++ b/src/ppl/test/annealing_constraint4.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.80u, in the RIGHT edge. -[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.80u, in the LEFT edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ req_rdy resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] ... ] to region 0.00u-100.80u at the LEFT edge. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-100.80u at the RIGHT edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_constraint5.ok b/src/ppl/test/annealing_constraint5.ok index a3d390d3ab7..6d2fb7da424 100644 --- a/src/ppl/test/annealing_constraint5.ok +++ b/src/ppl/test/annealing_constraint5.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.80u at the RIGHT edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.80u at the RIGHT edge. +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_constraint6.ok b/src/ppl/test/annealing_constraint6.ok index cbcecd8f88f..458f8dddd85 100644 --- a/src/ppl/test/annealing_constraint6.ok +++ b/src/ppl/test/annealing_constraint6.ok @@ -3,11 +3,11 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] -[INFO PPL-0048] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0044] Pin group: [ resp_msg[0] resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] ... ] -Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.13u at the TOP edge. +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 1008 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_constraint7.ok b/src/ppl/test/annealing_constraint7.ok index f767357c3cb..a686155e69a 100644 --- a/src/ppl/test/annealing_constraint7.ok +++ b/src/ppl/test/annealing_constraint7.ok @@ -3,11 +3,11 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.80u at the LEFT edge. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] -[INFO PPL-0048] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.80u at the RIGHT edge. [INFO PPL-0044] Pin group: [ resp_msg[0] resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] ... ] -Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.80u at the RIGHT edge. +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.80u at the LEFT edge. [INFO PPL-0001] Number of available slots 1008 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_constraint8.ok b/src/ppl/test/annealing_constraint8.ok index cd8e47ce671..229367d9a0c 100644 --- a/src/ppl/test/annealing_constraint8.ok +++ b/src/ppl/test/annealing_constraint8.ok @@ -3,11 +3,11 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ resp_val ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ clk ] to region 0.00u-100.13u at the TOP edge. -[INFO PPL-0048] Restrict pins [ reset ] to region 0.00u-100.80u at the LEFT edge. -[INFO PPL-0048] Restrict pins [ resp_rdy ] to region 0.00u-100.80u at the RIGHT edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ resp_val ] to region 0.00u-100.13u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ resp_rdy ] to region 0.00u-100.80u at the RIGHT edge. +[INFO PPL-0067] Restrict pins [ reset ] to region 0.00u-100.80u at the LEFT edge. +[INFO PPL-0067] Restrict pins [ clk ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_large_groups1.ok b/src/ppl/test/annealing_large_groups1.ok index 207105472f2..043b0128b75 100644 --- a/src/ppl/test/annealing_large_groups1.ok +++ b/src/ppl/test/annealing_large_groups1.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 400 pins. [INFO ODB-0131] Created 1 components and 6 component-terminals. [INFO ODB-0133] Created 1 nets and 1 connections. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ pin0 pin1 pin2 pin3 pin4 ... ] [INFO PPL-0044] Pin group: [ pin256 pin257 pin258 pin259 pin260 ... ] -Found 0 macro blocks. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 400 [INFO PPL-0003] Number of I/O w/sink 400 diff --git a/src/ppl/test/annealing_large_groups2.ok b/src/ppl/test/annealing_large_groups2.ok index 83773774a88..8340fd826a7 100644 --- a/src/ppl/test/annealing_large_groups2.ok +++ b/src/ppl/test/annealing_large_groups2.ok @@ -3,8 +3,8 @@ [INFO ODB-0130] Created 400 pins. [INFO ODB-0131] Created 1 components and 6 component-terminals. [INFO ODB-0133] Created 1 nets and 1 connections. -[INFO PPL-0044] Pin group: [ pin0 pin1 pin2 pin3 pin4 ... ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ pin0 pin1 pin2 pin3 pin4 ... ] [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 400 [INFO PPL-0003] Number of I/O w/sink 400 diff --git a/src/ppl/test/annealing_mirrored3.ok b/src/ppl/test/annealing_mirrored3.ok index 3feccf41434..35e0f0336e5 100644 --- a/src/ppl/test/annealing_mirrored3.ok +++ b/src/ppl/test/annealing_mirrored3.ok @@ -3,8 +3,8 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_mirrored4.ok b/src/ppl/test/annealing_mirrored4.ok index 85f6b483efd..5f1adbb693a 100644 --- a/src/ppl/test/annealing_mirrored4.ok +++ b/src/ppl/test/annealing_mirrored4.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] +[INFO PPL-0067] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/annealing_mirrored5.ok b/src/ppl/test/annealing_mirrored5.ok index 5d105f21afc..c57207064b8 100644 --- a/src/ppl/test/annealing_mirrored5.ok +++ b/src/ppl/test/annealing_mirrored5.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] +[INFO PPL-0067] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/cells_not_placed.ok b/src/ppl/test/cells_not_placed.ok index 4ae5475dc63..4c5cc2d03a8 100644 --- a/src/ppl/test/cells_not_placed.ok +++ b/src/ppl/test/cells_not_placed.ok @@ -3,10 +3,10 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 295 components and 1600 component-terminals. [INFO ODB-0133] Created 54 nets and 164 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge. -[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the BOTTOM edge. Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ req_rdy resp_msg[0] resp_msg[10] resp_msg[11] resp_msg[12] ... ] to region 0.00u-100.13u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ clk req_msg[0] req_msg[10] req_msg[11] req_msg[12] ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0001] Number of available slots 1220 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/group_pins10.ok b/src/ppl/test/group_pins10.ok index 7f5de562760..94e16ee33a8 100644 --- a/src/ppl/test/group_pins10.ok +++ b/src/ppl/test/group_pins10.ok @@ -3,12 +3,11 @@ [INFO ODB-0130] Created 103 pins. [INFO ODB-0131] Created 103 components and 412 component-terminals. [INFO ODB-0133] Created 103 nets and 103 connections. -[INFO PPL-0048] Restrict pins [ bus[0] bus[1] bus[2] bus[3] bus[4] ... ] to region 0.00u-100.80u at the LEFT edge. -[INFO PPL-0044] Pin group: [ bus[0] bus[1] bus[2] bus[3] bus[4] ... ] -[INFO PPL-0048] Restrict pins [ clk ] to region 0.00u-100.80u at the LEFT edge. -[INFO PPL-0044] Pin group: [ clk ] Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0044] Pin group: [ bus[0] bus[1] bus[2] bus[3] bus[4] ... ] +[INFO PPL-0044] Pin group: [ clk ] +[INFO PPL-0067] Restrict pins [ clk bus[0] bus[1] bus[2] bus[3] ... ] to region 0.00u-100.80u at the LEFT edge. [INFO PPL-0001] Number of available slots 1220 [INFO PPL-0002] Number of I/O 103 [INFO PPL-0003] Number of I/O w/sink 103 diff --git a/src/ppl/test/group_pins12.defok b/src/ppl/test/group_pins12.defok index 1e9992bf7e4..c7badb97ea8 100644 --- a/src/ppl/test/group_pins12.defok +++ b/src/ppl/test/group_pins12.defok @@ -117,8 +117,8 @@ END COMPONENTS PINS 54 ; - clk + NET clk + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 200190 104860 ) N ; + + LAYER metal2 ( -70 -70 ) ( 70 70 ) + + PLACED ( 76190 70 ) N ; - req_msg[0] + NET req_msg[0] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) @@ -257,8 +257,8 @@ PINS 54 ; + PLACED ( 70 176260 ) N ; - reset + NET reset + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 70 104860 ) N ; + + LAYER metal2 ( -70 -70 ) ( 70 70 ) + + PLACED ( 76190 201530 ) N ; - resp_msg[0] + NET resp_msg[0] + DIRECTION OUTPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) diff --git a/src/ppl/test/group_pins12.ok b/src/ppl/test/group_pins12.ok index bbb55c7b832..360ce6ab5fe 100644 --- a/src/ppl/test/group_pins12.ok +++ b/src/ppl/test/group_pins12.ok @@ -3,13 +3,13 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the TOP edge. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] -[INFO PPL-0048] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0044] Pin group: [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] -[INFO PPL-0048] Restrict pins [ req_rdy req_val resp_rdy resp_val ] to region 0.00u-100.80u at the LEFT edge. [INFO PPL-0044] Pin group: [ resp_val resp_rdy req_val req_rdy ] -Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.13u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ req_rdy req_val resp_rdy resp_val ] to region 0.00u-100.80u at the LEFT edge. +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 @@ -17,5 +17,5 @@ Found 0 macro blocks. [INFO PPL-0006] Number of I/O Groups 3 [INFO PPL-0005] Slots per section 200 [INFO PPL-0008] Successfully assigned pins to sections. -[INFO PPL-0012] I/O nets HPWL: 3962.14 um. +[INFO PPL-0012] I/O nets HPWL: 4022.68 um. No differences found. diff --git a/src/ppl/test/group_pins4.ok b/src/ppl/test/group_pins4.ok index 89353840cb5..688739b502d 100644 --- a/src/ppl/test/group_pins4.ok +++ b/src/ppl/test/group_pins4.ok @@ -3,15 +3,15 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 294 components and 1577 component-terminals. [INFO ODB-0133] Created 54 nets and 131 connections. -[INFO PPL-0048] Restrict pins [ req_msg[0] req_msg[10] req_msg[11] req_msg[12] req_msg[13] ... ] to region 25.00u-95.00u at the LEFT edge. -[INFO PPL-0048] Restrict pins [ req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] ... ] to region 5.00u-95.00u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ clk req_rdy req_val reset resp_msg[0] ... ] to region 15.00u-95.00u at the TOP edge. -[INFO PPL-0048] Restrict pins [ resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] resp_msg[5] ... ] to region 35.00u-75.00u at the RIGHT edge. Found 0 macro blocks. [INFO PPL-0044] Pin group: [ req_msg[10] req_msg[11] req_msg[12] req_msg[13] req_msg[14] ... ] [INFO PPL-0044] Pin group: [ req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] ... ] [INFO PPL-0044] Pin group: [ clk req_rdy req_val reset resp_msg[0] ... ] [INFO PPL-0044] Pin group: [ resp_rdy resp_val resp_msg[1] resp_msg[2] resp_msg[3] ... ] +[INFO PPL-0067] Restrict pins [ resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] resp_msg[5] ... ] to region 35.00u-75.00u at the RIGHT edge. +[INFO PPL-0067] Restrict pins [ req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] ... ] to region 5.00u-95.00u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ req_msg[0] req_msg[10] req_msg[11] req_msg[12] req_msg[13] ... ] to region 25.00u-95.00u at the LEFT edge. +[INFO PPL-0067] Restrict pins [ clk req_rdy req_val reset resp_msg[0] ... ] to region 15.00u-95.00u at the TOP edge. [INFO PPL-0001] Number of available slots 552 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/group_pins6.ok b/src/ppl/test/group_pins6.ok index 9839028ea77..330c2a756ef 100644 --- a/src/ppl/test/group_pins6.ok +++ b/src/ppl/test/group_pins6.ok @@ -3,15 +3,15 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 294 components and 1577 component-terminals. [INFO ODB-0133] Created 54 nets and 131 connections. -[INFO PPL-0048] Restrict pins [ req_msg[0] req_msg[10] req_msg[11] req_msg[12] req_msg[13] ... ] to region 25.00u-95.00u at the LEFT edge. -[INFO PPL-0048] Restrict pins [ req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] ... ] to region 5.00u-95.00u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ clk req_rdy req_val reset resp_msg[0] ... ] to region 15.00u-95.00u at the TOP edge. -[INFO PPL-0048] Restrict pins [ resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] resp_msg[5] ... ] to region 35.00u-75.00u at the RIGHT edge. Found 0 macro blocks. [INFO PPL-0044] Pin group: [ req_msg[10] req_msg[11] req_msg[12] req_msg[13] req_msg[14] ... ] [INFO PPL-0044] Pin group: [ req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] ... ] [INFO PPL-0044] Pin group: [ clk req_rdy req_val reset resp_msg[0] ... ] [INFO PPL-0044] Pin group: [ resp_rdy resp_val resp_msg[1] resp_msg[2] resp_msg[3] ... ] +[INFO PPL-0067] Restrict pins [ resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] resp_msg[5] ... ] to region 35.00u-75.00u at the RIGHT edge. +[INFO PPL-0067] Restrict pins [ req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] ... ] to region 5.00u-95.00u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ req_msg[0] req_msg[10] req_msg[11] req_msg[12] req_msg[13] ... ] to region 25.00u-95.00u at the LEFT edge. +[INFO PPL-0067] Restrict pins [ clk req_rdy req_val reset resp_msg[0] ... ] to region 15.00u-95.00u at the TOP edge. [INFO PPL-0001] Number of available slots 1248 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/group_pins7.ok b/src/ppl/test/group_pins7.ok index e0d5619df00..e78df3ec0b3 100644 --- a/src/ppl/test/group_pins7.ok +++ b/src/ppl/test/group_pins7.ok @@ -3,15 +3,15 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 294 components and 1577 component-terminals. [INFO ODB-0133] Created 54 nets and 131 connections. -[INFO PPL-0048] Restrict pins [ req_msg[0] req_msg[10] req_msg[11] req_msg[12] req_msg[13] ... ] to region 0.00u-100.80u at the LEFT edge. -[INFO PPL-0048] Restrict pins [ req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ clk req_rdy req_val reset resp_msg[0] ... ] to region 0.00u-100.13u at the TOP edge. -[INFO PPL-0048] Restrict pins [ resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] resp_msg[5] ... ] to region 0.00u-100.80u at the RIGHT edge. Found 0 macro blocks. [INFO PPL-0044] Pin group: [ req_msg[10] req_msg[11] req_msg[12] req_msg[13] req_msg[14] ... ] [INFO PPL-0044] Pin group: [ req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] ... ] [INFO PPL-0044] Pin group: [ clk req_rdy req_val reset resp_msg[0] ... ] [INFO PPL-0044] Pin group: [ resp_rdy resp_val resp_msg[1] resp_msg[2] resp_msg[3] ... ] +[INFO PPL-0067] Restrict pins [ resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] resp_msg[5] ... ] to region 0.00u-100.80u at the RIGHT edge. +[INFO PPL-0067] Restrict pins [ req_msg[24] req_msg[25] req_msg[26] req_msg[27] req_msg[28] ... ] to region 0.00u-100.13u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ req_msg[0] req_msg[10] req_msg[11] req_msg[12] req_msg[13] ... ] to region 0.00u-100.80u at the LEFT edge. +[INFO PPL-0067] Restrict pins [ clk req_rdy req_val reset resp_msg[0] ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0001] Number of available slots 1248 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/group_pins8.ok b/src/ppl/test/group_pins8.ok index a96a5d9a37c..639e7e3c8ca 100644 --- a/src/ppl/test/group_pins8.ok +++ b/src/ppl/test/group_pins8.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ resp_val resp_rdy req_rdy ] [INFO PPL-0044] Pin group: [ req_msg[15] req_msg[14] resp_msg[15] resp_msg[14] ] -Found 0 macro blocks. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/group_pins9.ok b/src/ppl/test/group_pins9.ok index f6970893f41..8fd1dfc9e0c 100644 --- a/src/ppl/test/group_pins9.ok +++ b/src/ppl/test/group_pins9.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ resp_val resp_rdy req_rdy ] [INFO PPL-0044] Pin group: [ req_msg[15] req_msg[14] resp_msg[15] resp_msg[14] ] -Found 0 macro blocks. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/group_pins_warn1.ok b/src/ppl/test/group_pins_warn1.ok index ef503dca893..ac18872629b 100644 --- a/src/ppl/test/group_pins_warn1.ok +++ b/src/ppl/test/group_pins_warn1.ok @@ -4,8 +4,8 @@ [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. Found 0 macro blocks. -[INFO PPL-0044] Pin group: [ resp_val resp_rdy req_rdy ] [WARNING STA-0366] port 'resp_msg[141]' not found. +[INFO PPL-0044] Pin group: [ resp_val resp_rdy req_rdy ] [INFO PPL-0044] Pin group: [ req_msg[15] req_msg[14] resp_msg[15] ] [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 diff --git a/src/ppl/test/large_groups1.ok b/src/ppl/test/large_groups1.ok index 2f40364fe72..e1d9eee9f93 100644 --- a/src/ppl/test/large_groups1.ok +++ b/src/ppl/test/large_groups1.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 400 pins. [INFO ODB-0131] Created 1 components and 6 component-terminals. [INFO ODB-0133] Created 1 nets and 1 connections. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ pin0 pin1 pin2 pin3 pin4 ... ] [INFO PPL-0044] Pin group: [ pin256 pin257 pin258 pin259 pin260 ... ] -Found 0 macro blocks. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 400 [INFO PPL-0003] Number of I/O w/sink 400 diff --git a/src/ppl/test/large_groups2.ok b/src/ppl/test/large_groups2.ok index 32e0ad47b06..cd8840df14b 100644 --- a/src/ppl/test/large_groups2.ok +++ b/src/ppl/test/large_groups2.ok @@ -3,8 +3,8 @@ [INFO ODB-0130] Created 400 pins. [INFO ODB-0131] Created 1 components and 6 component-terminals. [INFO ODB-0133] Created 1 nets and 1 connections. -[INFO PPL-0044] Pin group: [ pin0 pin1 pin2 pin3 pin4 ... ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ pin0 pin1 pin2 pin3 pin4 ... ] [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 400 [INFO PPL-0003] Number of I/O w/sink 400 diff --git a/src/ppl/test/large_groups3.ok b/src/ppl/test/large_groups3.ok index f4b7e3495a0..7b4b952d514 100644 --- a/src/ppl/test/large_groups3.ok +++ b/src/ppl/test/large_groups3.ok @@ -3,11 +3,10 @@ [INFO ODB-0130] Created 400 pins. [INFO ODB-0131] Created 1 components and 6 component-terminals. [INFO ODB-0133] Created 1 nets and 1 connections. -[INFO PPL-0048] Restrict pins [ pin0 pin1 pin10 pin100 pin101 ... ] to region 0.00u-100.13u at the TOP edge. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ pin0 pin1 pin2 pin3 pin4 ... ] -[INFO PPL-0048] Restrict pins [ pin300 pin301 pin302 pin303 pin304 ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0044] Pin group: [ pin300 pin301 pin302 pin303 pin304 ... ] -Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ pin0 pin1 pin10 pin100 pin101 ... ] to region 0.00u-100.13u at the TOP edge. [WARNING PPL-0110] Constraint has 371 pins, but only 369 available slots. Increase the region 0.00um-100.13um on the TOP edge to 14.64um-100.13um. [ERROR PPL-0111] 1 constraint(s) does not have available slots for the pins. diff --git a/src/ppl/test/large_groups4.ok b/src/ppl/test/large_groups4.ok index 0b86a8a093b..eb6827f3169 100644 --- a/src/ppl/test/large_groups4.ok +++ b/src/ppl/test/large_groups4.ok @@ -3,11 +3,11 @@ [INFO ODB-0130] Created 400 pins. [INFO ODB-0131] Created 1 components and 6 component-terminals. [INFO ODB-0133] Created 1 nets and 1 connections. -[INFO PPL-0048] Restrict pins [ pin0 pin1 pin10 pin100 pin101 ... ] to region 0.00u-100.13u at the TOP edge. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ pin0 pin1 pin2 pin3 pin4 ... ] -[INFO PPL-0048] Restrict pins [ pin300 pin301 pin302 pin303 pin304 ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0044] Pin group: [ pin300 pin301 pin302 pin303 pin304 ... ] -Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ pin300 pin301 pin302 pin303 pin304 ... ] to region 0.00u-100.13u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ pin0 pin1 pin10 pin100 pin101 ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0001] Number of available slots 1746 [INFO PPL-0002] Number of I/O 400 [INFO PPL-0003] Number of I/O w/sink 400 diff --git a/src/ppl/test/ppl_aux.py b/src/ppl/test/ppl_aux.py index 0366d82525b..513ccfd314d 100644 --- a/src/ppl/test/ppl_aux.py +++ b/src/ppl/test/ppl_aux.py @@ -227,7 +227,7 @@ def place_pins( utl.PPL, 343, f"Pin {pin_name} not found in group {group_idx}." ) - design.getIOPlacer().addPinGroup(pin_list, False) + dbBlock.addBTermGroup(pin_list, False) group_idx += 1 design.getIOPlacer().runHungarianMatching(random) @@ -384,16 +384,18 @@ def set_io_pin_constraint( "Both 'direction' and 'pin_names' constraints not allowed.", ) + constraint_region = dbBlock.findConstraintRegion(edge, begin, end) + if direction != None: dir = parse_direction(design, direction) # utl.info(utl.PPL, 349, f"Restrict {direction} pins to region " + # f"{design.micronToDBU(begin)}-{design.micronToDBU(end)}, " + # f"in the {edge} edge.") - design.getIOPlacer().addDirectionConstraint(dir, edge_, begin, end) + dbBlock.addBTermDirectionConstraint(dir, constraint_region) if pin_names != None: pin_list = parse_pin_names(design, pin_names) - design.getIOPlacer().addNamesConstraint(pin_list, edge_, begin, end) + dbBlock.addBTermNamesConstraint(pin_list, constraint_region) elif bool(re.fullmatch("(up):(.*)", region)): # no walrus in < 3.8 @@ -435,7 +437,7 @@ def set_io_pin_constraint( utl.PPL, 500, f"Group pin {pin_name} not found in the design." ) - design.getIOPlacer().addPinGroup(pin_list, order) + dbBlock.addBTermGroup(pin_list, order) else: utl.warn(utl.PPL, 373, f"Constraint with region {region} has an invalid edge.") @@ -448,7 +450,7 @@ def parse_direction(design, direction): or re.fullmatch("INOUT", direction, re.I) != None or re.fullmatch("FEEDTHRU", direction, re.I) != None ): - return design.getIOPlacer().getDirection(direction.lower()) + return direction.lower() else: utl.error(utl.PPL, 328, f"Invalid pin direction {direction}.") diff --git a/src/ppl/test/random3.ok b/src/ppl/test/random3.ok index f58fd90f666..f025ec20ff6 100644 --- a/src/ppl/test/random3.ok +++ b/src/ppl/test/random3.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge. -[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the BOTTOM edge. Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ req_rdy resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] ... ] to region 0.00u-100.13u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ clk req_msg[31] req_msg[30] req_msg[29] req_msg[28] ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0007] Random pin placement. No differences found. diff --git a/src/ppl/test/random4.ok b/src/ppl/test/random4.ok index af11a5c1e79..93542767cd3 100644 --- a/src/ppl/test/random4.ok +++ b/src/ppl/test/random4.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_rdy req_val resp_rdy resp_val ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ req_msg[15] req_msg[14] resp_msg[15] resp_msg[14] ] to region 0.00u-100.13u at the TOP edge. Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ req_rdy req_val resp_rdy resp_val ] to region 0.00u-100.13u at the BOTTOM edge. +[INFO PPL-0067] Restrict pins [ req_msg[15] req_msg[14] resp_msg[15] resp_msg[14] ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0007] Random pin placement. No differences found. diff --git a/src/ppl/test/random8.ok b/src/ppl/test/random8.ok index c965e95e30c..75c16acca62 100644 --- a/src/ppl/test/random8.ok +++ b/src/ppl/test/random8.ok @@ -3,11 +3,5 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-100.13u, in the TOP edge. -[INFO PPL-0067] Restrict OUTPUT pins to region 0.00u-100.13u, in the BOTTOM edge. -[INFO PPL-0048] Restrict pins [ req_msg[17] req_msg[16] req_msg[15] req_msg[14] ] to region 0.00u-100.80u at the LEFT edge. -Found 0 macro blocks. -Using 2 tracks default min distance between IO pins. -[INFO PPL-0044] Pin group: [ req_msg[14] req_msg[15] req_msg[16] req_msg[17] ] -[ERROR PPL-0098] Pins req_msg[17] req_msg[16] req_msg[15] req_msg[14] are assigned to multiple constraints. -PPL-0098 +[ERROR ODB-0239] Pin req_msg[14] is assigned to multiple constraints. +ODB-0239 diff --git a/src/ppl/test/random8.tcl b/src/ppl/test/random8.tcl index 3932182c24a..557135ce1fc 100644 --- a/src/ppl/test/random8.tcl +++ b/src/ppl/test/random8.tcl @@ -5,6 +5,5 @@ read_def gcd.def set_io_pin_constraint -direction INPUT -region top:* set_io_pin_constraint -direction OUTPUT -region bottom:* -set_io_pin_constraint -pin_names {req_msg[14] req_msg[15] req_msg[16] req_msg[17]} -region left:* -catch {place_pins -hor_layers metal3 -ver_layers metal2 -random -group_pins {req_msg[14] req_msg[15] req_msg[16] req_msg[17]}} error +catch {set_io_pin_constraint -pin_names {req_msg[14] req_msg[15] req_msg[16] req_msg[17]} -region left:*} error puts $error diff --git a/src/ppl/test/random9.ok b/src/ppl/test/random9.ok index 2cb7c6b9ea4..8bc4836ed79 100644 --- a/src/ppl/test/random9.ok +++ b/src/ppl/test/random9.ok @@ -3,8 +3,8 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[15] req_msg[14] ] to region 0.00u-100.13u at the TOP edge. Found 0 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ req_msg[15] req_msg[14] ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0007] Random pin placement. No differences found. diff --git a/src/ppl/test/write_pin_placement1.ok b/src/ppl/test/write_pin_placement1.ok index 4e6a14c74cc..1142983f95c 100644 --- a/src/ppl/test/write_pin_placement1.ok +++ b/src/ppl/test/write_pin_placement1.ok @@ -3,11 +3,11 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] -[INFO PPL-0048] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.13u at the TOP edge. [INFO PPL-0044] Pin group: [ resp_msg[0] resp_msg[1] resp_msg[2] resp_msg[3] resp_msg[4] ... ] -Found 0 macro blocks. +[INFO PPL-0067] Restrict pins [ resp_msg[15] resp_msg[14] resp_msg[13] resp_msg[12] resp_msg[11] ... ] to region 0.00u-100.13u at the TOP edge. +[INFO PPL-0067] Restrict pins [ req_msg[31] req_msg[30] req_msg[29] req_msg[28] req_msg[27] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 1008 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/write_pin_placement2.ok b/src/ppl/test/write_pin_placement2.ok index 9a4e5bfda58..cca91cfafe8 100644 --- a/src/ppl/test/write_pin_placement2.ok +++ b/src/ppl/test/write_pin_placement2.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 400 pins. [INFO ODB-0131] Created 1 components and 6 component-terminals. [INFO ODB-0133] Created 1 nets and 1 connections. +Found 0 macro blocks. [INFO PPL-0044] Pin group: [ pin0 pin1 pin2 pin3 pin4 ... ] [INFO PPL-0044] Pin group: [ pin256 pin257 pin258 pin259 pin260 ... ] -Found 0 macro blocks. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 400 [INFO PPL-0003] Number of I/O w/sink 400 diff --git a/src/ppl/test/write_pin_placement3.ok b/src/ppl/test/write_pin_placement3.ok index d3f1c79f9ac..2b7164e592b 100644 --- a/src/ppl/test/write_pin_placement3.ok +++ b/src/ppl/test/write_pin_placement3.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] +[INFO PPL-0067] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 diff --git a/src/ppl/test/write_pin_placement4.ok b/src/ppl/test/write_pin_placement4.ok index abdf0d25f8f..b032dc11933 100644 --- a/src/ppl/test/write_pin_placement4.ok +++ b/src/ppl/test/write_pin_placement4.ok @@ -3,9 +3,9 @@ [INFO ODB-0130] Created 54 pins. [INFO ODB-0131] Created 88 components and 422 component-terminals. [INFO ODB-0133] Created 54 nets and 88 connections. -[INFO PPL-0048] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. -[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] Found 0 macro blocks. +[INFO PPL-0044] Pin group: [ req_msg[0] req_msg[1] req_msg[2] req_msg[3] req_msg[4] ... ] +[INFO PPL-0067] Restrict pins [ req_msg[10] req_msg[9] req_msg[8] req_msg[7] req_msg[6] ... ] to region 0.00u-100.13u at the BOTTOM edge. [INFO PPL-0001] Number of available slots 2494 [INFO PPL-0002] Number of I/O 54 [INFO PPL-0003] Number of I/O w/sink 54 From 97892722e5edb4a2a5dfbeca6dc04ab2ed914eaf Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Mon, 10 Mar 2025 02:50:19 -0300 Subject: [PATCH 10/12] odb: set mirrored bterm only for the main pin Signed-off-by: Eder Monteiro --- src/odb/src/db/odb.tcl | 1 - src/ppl/test/add_constraint9.defok | 28 ++++++++++++++-------------- src/ppl/test/add_constraint9.ok | 2 +- src/ppl/test/group_pins12.defok | 8 ++++---- src/ppl/test/group_pins12.ok | 2 +- 5 files changed, 20 insertions(+), 21 deletions(-) diff --git a/src/odb/src/db/odb.tcl b/src/odb/src/db/odb.tcl index d8ae887609e..437f8777054 100644 --- a/src/odb/src/db/odb.tcl +++ b/src/odb/src/db/odb.tcl @@ -829,7 +829,6 @@ proc add_pin_group {pin_list order} { proc add_mirrored_pins {bterm1 bterm2} { if {$bterm1 != "NULL" && $bterm2 != "NULL"} { $bterm1 setMirroredBTerm $bterm2 - $bterm2 setMirroredBTerm $bterm1 } } diff --git a/src/ppl/test/add_constraint9.defok b/src/ppl/test/add_constraint9.defok index 8fb9731292e..76e70f2bdee 100644 --- a/src/ppl/test/add_constraint9.defok +++ b/src/ppl/test/add_constraint9.defok @@ -122,7 +122,7 @@ PINS 54 ; - req_msg[0] + NET req_msg[0] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 200190 141540 ) N ; + + PLACED ( 200190 163940 ) N ; - req_msg[10] + NET req_msg[10] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) @@ -165,8 +165,8 @@ PINS 54 ; + PLACED ( 140030 201530 ) N ; - req_msg[1] + NET req_msg[1] + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal2 ( -70 -70 ) ( 70 70 ) - + PLACED ( 74290 70 ) N ; + + LAYER metal3 ( -70 -70 ) ( 70 70 ) + + PLACED ( 200190 149660 ) N ; - req_msg[20] + NET req_msg[20] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) @@ -209,8 +209,8 @@ PINS 54 ; + PLACED ( 88730 70 ) N ; - req_msg[2] + NET req_msg[2] + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal2 ( -70 -70 ) ( 70 70 ) - + PLACED ( 151050 201530 ) N ; + + LAYER metal3 ( -70 -70 ) ( 70 70 ) + + PLACED ( 200190 135940 ) N ; - req_msg[30] + NET req_msg[30] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) @@ -221,8 +221,8 @@ PINS 54 ; + PLACED ( 165490 201530 ) N ; - req_msg[3] + NET req_msg[3] + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 70 175140 ) N ; + + LAYER metal2 ( -70 -70 ) ( 70 70 ) + + PLACED ( 165110 201530 ) N ; - req_msg[4] + NET req_msg[4] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) @@ -262,7 +262,7 @@ PINS 54 ; - resp_msg[0] + NET resp_msg[0] + DIRECTION OUTPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 70 141540 ) N ; + + PLACED ( 70 163940 ) N ; - resp_msg[10] + NET resp_msg[10] + DIRECTION OUTPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) @@ -289,16 +289,16 @@ PINS 54 ; + PLACED ( 70 26460 ) N ; - resp_msg[1] + NET resp_msg[1] + DIRECTION OUTPUT + USE SIGNAL + PORT - + LAYER metal2 ( -70 -70 ) ( 70 70 ) - + PLACED ( 74290 201530 ) N ; + + LAYER metal3 ( -70 -70 ) ( 70 70 ) + + PLACED ( 70 149660 ) N ; - resp_msg[2] + NET resp_msg[2] + DIRECTION OUTPUT + USE SIGNAL + PORT - + LAYER metal2 ( -70 -70 ) ( 70 70 ) - + PLACED ( 151050 70 ) N ; + + LAYER metal3 ( -70 -70 ) ( 70 70 ) + + PLACED ( 70 135940 ) N ; - resp_msg[3] + NET resp_msg[3] + DIRECTION OUTPUT + USE SIGNAL + PORT - + LAYER metal3 ( -70 -70 ) ( 70 70 ) - + PLACED ( 200190 175140 ) N ; + + LAYER metal2 ( -70 -70 ) ( 70 70 ) + + PLACED ( 165110 70 ) N ; - resp_msg[4] + NET resp_msg[4] + DIRECTION OUTPUT + USE SIGNAL + PORT + LAYER metal3 ( -70 -70 ) ( 70 70 ) diff --git a/src/ppl/test/add_constraint9.ok b/src/ppl/test/add_constraint9.ok index 94c275d798d..f40c3cdc047 100644 --- a/src/ppl/test/add_constraint9.ok +++ b/src/ppl/test/add_constraint9.ok @@ -10,5 +10,5 @@ Found 0 macro blocks. [INFO PPL-0004] Number of I/O w/o sink 0 [INFO PPL-0005] Slots per section 200 [INFO PPL-0008] Successfully assigned pins to sections. -[INFO PPL-0012] I/O nets HPWL: 1009.01 um. +[INFO PPL-0012] I/O nets HPWL: 987.97 um. No differences found. diff --git a/src/ppl/test/group_pins12.defok b/src/ppl/test/group_pins12.defok index c7badb97ea8..1e9992bf7e4 100644 --- a/src/ppl/test/group_pins12.defok +++ b/src/ppl/test/group_pins12.defok @@ -117,8 +117,8 @@ END COMPONENTS PINS 54 ; - clk + NET clk + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal2 ( -70 -70 ) ( 70 70 ) - + PLACED ( 76190 70 ) N ; + + LAYER metal3 ( -70 -70 ) ( 70 70 ) + + PLACED ( 200190 104860 ) N ; - req_msg[0] + NET req_msg[0] + DIRECTION INPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) @@ -257,8 +257,8 @@ PINS 54 ; + PLACED ( 70 176260 ) N ; - reset + NET reset + DIRECTION INPUT + USE SIGNAL + PORT - + LAYER metal2 ( -70 -70 ) ( 70 70 ) - + PLACED ( 76190 201530 ) N ; + + LAYER metal3 ( -70 -70 ) ( 70 70 ) + + PLACED ( 70 104860 ) N ; - resp_msg[0] + NET resp_msg[0] + DIRECTION OUTPUT + USE SIGNAL + PORT + LAYER metal2 ( -70 -70 ) ( 70 70 ) diff --git a/src/ppl/test/group_pins12.ok b/src/ppl/test/group_pins12.ok index 360ce6ab5fe..eadebe4f566 100644 --- a/src/ppl/test/group_pins12.ok +++ b/src/ppl/test/group_pins12.ok @@ -17,5 +17,5 @@ Found 0 macro blocks. [INFO PPL-0006] Number of I/O Groups 3 [INFO PPL-0005] Slots per section 200 [INFO PPL-0008] Successfully assigned pins to sections. -[INFO PPL-0012] I/O nets HPWL: 4022.68 um. +[INFO PPL-0012] I/O nets HPWL: 3962.14 um. No differences found. From 795ed43d2099aff1f990ef305ba183b13077e2aa Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Mon, 10 Mar 2025 02:52:03 -0300 Subject: [PATCH 11/12] mpl: update ok files Signed-off-by: Eder Monteiro --- src/mpl/test/guides1.ok | 2 +- src/mpl/test/io_constraints1.ok | 2 +- src/mpl/test/orientation_improve1.ok | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mpl/test/guides1.ok b/src/mpl/test/guides1.ok index 1494f86dc98..16036bbe5e1 100644 --- a/src/mpl/test/guides1.ok +++ b/src/mpl/test/guides1.ok @@ -5,9 +5,9 @@ [INFO ODB-0128] Design: guides1 [INFO ODB-0252] Updated 3 pins. [INFO ODB-0253] Updated 401 components. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-125.00u, in the LEFT edge. Found 1 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ io_1 io_2 io_3 ] to region 0.00u-125.00u at the LEFT edge. [INFO PPL-0001] Number of available slots 966 [INFO PPL-0002] Number of I/O 3 [INFO PPL-0003] Number of I/O w/sink 0 diff --git a/src/mpl/test/io_constraints1.ok b/src/mpl/test/io_constraints1.ok index cccf48ceac5..1186a9226cf 100644 --- a/src/mpl/test/io_constraints1.ok +++ b/src/mpl/test/io_constraints1.ok @@ -5,9 +5,9 @@ [INFO ODB-0128] Design: io_constraints1 [INFO ODB-0252] Updated 3 pins. [INFO ODB-0253] Updated 401 components. -[INFO PPL-0067] Restrict INPUT pins to region 0.00u-125.00u, in the LEFT edge. Found 1 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ io_1 io_2 io_3 ] to region 0.00u-125.00u at the LEFT edge. [INFO PPL-0001] Number of available slots 966 [INFO PPL-0002] Number of I/O 3 [INFO PPL-0003] Number of I/O w/sink 0 diff --git a/src/mpl/test/orientation_improve1.ok b/src/mpl/test/orientation_improve1.ok index 36591c84e13..6b1c508fd9d 100644 --- a/src/mpl/test/orientation_improve1.ok +++ b/src/mpl/test/orientation_improve1.ok @@ -4,9 +4,9 @@ [INFO ODB-0130] Created 1 pins. [INFO ODB-0131] Created 1 components and 2 component-terminals. [INFO ODB-0133] Created 1 nets and 1 connections. -[INFO PPL-0067] Restrict INPUT pins to region 10.00u-30.00u, in the RIGHT edge. Found 1 macro blocks. Using 2 tracks default min distance between IO pins. +[INFO PPL-0067] Restrict pins [ io_1 ] to region 10.00u-30.00u at the RIGHT edge. [INFO PPL-0001] Number of available slots 842 [INFO PPL-0002] Number of I/O 1 [INFO PPL-0003] Number of I/O w/sink 1 From 01e083d5436e01d646c62fb9e30326344bc0a024 Mon Sep 17 00:00:00 2001 From: Eder Monteiro Date: Mon, 10 Mar 2025 03:02:37 -0300 Subject: [PATCH 12/12] ppl: check if block exists Signed-off-by: Eder Monteiro --- src/ppl/src/IOPlacer.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/ppl/src/IOPlacer.cpp b/src/ppl/src/IOPlacer.cpp index 12560925fe1..c8c53ecd6b5 100644 --- a/src/ppl/src/IOPlacer.cpp +++ b/src/ppl/src/IOPlacer.cpp @@ -110,8 +110,10 @@ odb::dbTechLayer* IOPlacer::getTopLayer() const void IOPlacer::clearConstraints() { constraints_.clear(); - for (odb::dbBTerm* bterm : getBlock()->getBTerms()) { - bterm->resetConstraintRegion(); + if (getBlock() != nullptr) { + for (odb::dbBTerm* bterm : getBlock()->getBTerms()) { + bterm->resetConstraintRegion(); + } } }