Skip to content

Commit 612958b

Browse files
bilalsakhawatbilalsakhawat
authored
Add support for Zfh extension (riscv#129)
1 parent 56125e6 commit 612958b

21 files changed

+3067
-13
lines changed

‎Makefile

+3
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,9 @@ SAIL_DEFAULT_INST += riscv_insts_zba.sail
2727
SAIL_DEFAULT_INST += riscv_insts_zbb.sail
2828
SAIL_DEFAULT_INST += riscv_insts_zbc.sail
2929
SAIL_DEFAULT_INST += riscv_insts_zbs.sail
30+
31+
SAIL_DEFAULT_INST += riscv_insts_zfh.sail
32+
3033
SAIL_DEFAULT_INST += riscv_insts_zkn.sail
3134
SAIL_DEFAULT_INST += riscv_insts_zks.sail
3235

‎c_emulator/riscv_softfloat.c

+269
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,58 @@ static uint_fast8_t uint8_of_rm(mach_bits rm) {
1717
zfloat_result = res.v; \
1818
zfloat_fflags |= (mach_bits) softfloat_exceptionFlags \
1919

20+
unit softfloat_f16add(mach_bits rm, mach_bits v1, mach_bits v2) {
21+
SOFTFLOAT_PRELUDE(rm);
22+
23+
float16_t a, b, res;
24+
a.v = v1;
25+
b.v = v2;
26+
res = f16_add(a, b);
27+
28+
SOFTFLOAT_POSTLUDE(res);
29+
30+
return UNIT;
31+
}
32+
33+
unit softfloat_f16sub(mach_bits rm, mach_bits v1, mach_bits v2) {
34+
SOFTFLOAT_PRELUDE(rm);
35+
36+
float16_t a, b, res;
37+
a.v = v1;
38+
b.v = v2;
39+
res = f16_sub(a, b);
40+
41+
SOFTFLOAT_POSTLUDE(res);
42+
43+
return UNIT;
44+
}
45+
46+
unit softfloat_f16mul(mach_bits rm, mach_bits v1, mach_bits v2) {
47+
SOFTFLOAT_PRELUDE(rm);
48+
49+
float16_t a, b, res;
50+
a.v = v1;
51+
b.v = v2;
52+
res = f16_mul(a, b);
53+
54+
SOFTFLOAT_POSTLUDE(res);
55+
56+
return UNIT;
57+
}
58+
59+
unit softfloat_f16div(mach_bits rm, mach_bits v1, mach_bits v2) {
60+
SOFTFLOAT_PRELUDE(rm);
61+
62+
float16_t a, b, res;
63+
a.v = v1;
64+
b.v = v2;
65+
res = f16_div(a, b);
66+
67+
SOFTFLOAT_POSTLUDE(res);
68+
69+
return UNIT;
70+
}
71+
2072
unit softfloat_f32add(mach_bits rm, mach_bits v1, mach_bits v2) {
2173
SOFTFLOAT_PRELUDE(rm);
2274

@@ -121,6 +173,20 @@ unit softfloat_f64div(mach_bits rm, mach_bits v1, mach_bits v2) {
121173
return UNIT;
122174
}
123175

176+
unit softfloat_f16muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3) {
177+
SOFTFLOAT_PRELUDE(rm);
178+
179+
float16_t a, b, c, res;
180+
a.v = v1;
181+
b.v = v2;
182+
c.v = v3;
183+
res = f16_mulAdd(a, b, c);
184+
185+
SOFTFLOAT_POSTLUDE(res);
186+
187+
return UNIT;
188+
}
189+
124190
unit softfloat_f32muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3) {
125191
SOFTFLOAT_PRELUDE(rm);
126192

@@ -149,6 +215,18 @@ unit softfloat_f64muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3)
149215
return UNIT;
150216
}
151217

218+
unit softfloat_f16sqrt(mach_bits rm, mach_bits v) {
219+
SOFTFLOAT_PRELUDE(rm);
220+
221+
float16_t a, res;
222+
a.v = v;
223+
res = f16_sqrt(a);
224+
225+
SOFTFLOAT_POSTLUDE(res);
226+
227+
return UNIT;
228+
}
229+
152230
unit softfloat_f32sqrt(mach_bits rm, mach_bits v) {
153231
SOFTFLOAT_PRELUDE(rm);
154232

@@ -176,6 +254,62 @@ unit softfloat_f64sqrt(mach_bits rm, mach_bits v) {
176254
// The boolean 'true' argument in the conversion calls below selects
177255
// 'exact' conversion, which sets the Inexact exception flag if
178256
// needed.
257+
unit softfloat_f16toi32(mach_bits rm, mach_bits v) {
258+
SOFTFLOAT_PRELUDE(rm);
259+
260+
float16_t a;
261+
float32_t res;
262+
uint_fast8_t rm8 = uint8_of_rm(rm);
263+
a.v = v;
264+
res.v = f16_to_i32(a, rm8, true);
265+
266+
SOFTFLOAT_POSTLUDE(res);
267+
268+
return UNIT;
269+
}
270+
271+
unit softfloat_f16toui32(mach_bits rm, mach_bits v) {
272+
SOFTFLOAT_PRELUDE(rm);
273+
274+
float16_t a;
275+
float32_t res;
276+
uint_fast8_t rm8 = uint8_of_rm(rm);
277+
a.v = v;
278+
res.v = f16_to_ui32(a, rm8, true);
279+
280+
SOFTFLOAT_POSTLUDE(res);
281+
282+
return UNIT;
283+
}
284+
285+
unit softfloat_f16toi64(mach_bits rm, mach_bits v) {
286+
SOFTFLOAT_PRELUDE(rm);
287+
288+
float16_t a;
289+
float64_t res;
290+
uint_fast8_t rm8 = uint8_of_rm(rm);
291+
a.v = v;
292+
res.v = f16_to_i64(a, rm8, true);
293+
294+
SOFTFLOAT_POSTLUDE(res);
295+
296+
return UNIT;
297+
}
298+
299+
unit softfloat_f16toui64(mach_bits rm, mach_bits v) {
300+
SOFTFLOAT_PRELUDE(rm);
301+
302+
float16_t a;
303+
float64_t res;
304+
uint_fast8_t rm8 = uint8_of_rm(rm);
305+
a.v = v;
306+
res.v = f16_to_ui64(a, rm8, true);
307+
308+
SOFTFLOAT_POSTLUDE(res);
309+
310+
return UNIT;
311+
}
312+
179313
unit softfloat_f32toi32(mach_bits rm, mach_bits v) {
180314
SOFTFLOAT_PRELUDE(rm);
181315

@@ -284,6 +418,50 @@ unit softfloat_f64toui64(mach_bits rm, mach_bits v) {
284418
return UNIT;
285419
}
286420

421+
unit softfloat_i32tof16(mach_bits rm, mach_bits v) {
422+
SOFTFLOAT_PRELUDE(rm);
423+
424+
float16_t res;
425+
res = i32_to_f16((int32_t)v);
426+
427+
SOFTFLOAT_POSTLUDE(res);
428+
429+
return UNIT;
430+
}
431+
432+
unit softfloat_ui32tof16(mach_bits rm, mach_bits v) {
433+
SOFTFLOAT_PRELUDE(rm);
434+
435+
float16_t res;
436+
res = ui32_to_f16((uint32_t)v);
437+
438+
SOFTFLOAT_POSTLUDE(res);
439+
440+
return UNIT;
441+
}
442+
443+
unit softfloat_i64tof16(mach_bits rm, mach_bits v) {
444+
SOFTFLOAT_PRELUDE(rm);
445+
446+
float16_t res;
447+
res = i64_to_f16(v);
448+
449+
SOFTFLOAT_POSTLUDE(res);
450+
451+
return UNIT;
452+
}
453+
454+
unit softfloat_ui64tof16(mach_bits rm, mach_bits v) {
455+
SOFTFLOAT_PRELUDE(rm);
456+
457+
float16_t res;
458+
res = ui64_to_f16(v);
459+
460+
SOFTFLOAT_POSTLUDE(res);
461+
462+
return UNIT;
463+
}
464+
287465
unit softfloat_i32tof32(mach_bits rm, mach_bits v) {
288466
SOFTFLOAT_PRELUDE(rm);
289467

@@ -372,6 +550,32 @@ unit softfloat_ui64tof64(mach_bits rm, mach_bits v) {
372550
return UNIT;
373551
}
374552

553+
unit softfloat_f16tof32(mach_bits rm, mach_bits v) {
554+
SOFTFLOAT_PRELUDE(rm);
555+
556+
float16_t a;
557+
float32_t res;
558+
a.v = v;
559+
res = f16_to_f32(a);
560+
561+
SOFTFLOAT_POSTLUDE(res);
562+
563+
return UNIT;
564+
}
565+
566+
unit softfloat_f16tof64(mach_bits rm, mach_bits v) {
567+
SOFTFLOAT_PRELUDE(rm);
568+
569+
float16_t a;
570+
float64_t res;
571+
a.v = v;
572+
res = f16_to_f64(a);
573+
574+
SOFTFLOAT_POSTLUDE(res);
575+
576+
return UNIT;
577+
}
578+
375579
unit softfloat_f32tof64(mach_bits rm, mach_bits v) {
376580
SOFTFLOAT_PRELUDE(rm);
377581

@@ -385,6 +589,32 @@ unit softfloat_f32tof64(mach_bits rm, mach_bits v) {
385589
return UNIT;
386590
}
387591

592+
unit softfloat_f32tof16(mach_bits rm, mach_bits v) {
593+
SOFTFLOAT_PRELUDE(rm);
594+
595+
float32_t a;
596+
float16_t res;
597+
a.v = v;
598+
res = f32_to_f16(a);
599+
600+
SOFTFLOAT_POSTLUDE(res);
601+
602+
return UNIT;
603+
}
604+
605+
unit softfloat_f64tof16(mach_bits rm, mach_bits v) {
606+
SOFTFLOAT_PRELUDE(rm);
607+
608+
float64_t a;
609+
float16_t res;
610+
a.v = v;
611+
res = f64_to_f16(a);
612+
613+
SOFTFLOAT_POSTLUDE(res);
614+
615+
return UNIT;
616+
}
617+
388618
unit softfloat_f64tof32(mach_bits rm, mach_bits v) {
389619
SOFTFLOAT_PRELUDE(rm);
390620

@@ -398,6 +628,45 @@ unit softfloat_f64tof32(mach_bits rm, mach_bits v) {
398628
return UNIT;
399629
}
400630

631+
unit softfloat_f16lt(mach_bits v1, mach_bits v2) {
632+
SOFTFLOAT_PRELUDE(0);
633+
634+
float16_t a, b, res;
635+
a.v = v1;
636+
b.v = v2;
637+
res.v = f16_lt(a, b);
638+
639+
SOFTFLOAT_POSTLUDE(res);
640+
641+
return UNIT;
642+
}
643+
644+
unit softfloat_f16le(mach_bits v1, mach_bits v2) {
645+
SOFTFLOAT_PRELUDE(0);
646+
647+
float16_t a, b, res;
648+
a.v = v1;
649+
b.v = v2;
650+
res.v = f16_le(a, b);
651+
652+
SOFTFLOAT_POSTLUDE(res);
653+
654+
return UNIT;
655+
}
656+
657+
unit softfloat_f16eq(mach_bits v1, mach_bits v2) {
658+
SOFTFLOAT_PRELUDE(0);
659+
660+
float16_t a, b, res;
661+
a.v = v1;
662+
b.v = v2;
663+
res.v = f16_eq(a, b);
664+
665+
SOFTFLOAT_POSTLUDE(res);
666+
667+
return UNIT;
668+
}
669+
401670
unit softfloat_f32lt(mach_bits v1, mach_bits v2) {
402671
SOFTFLOAT_PRELUDE(0);
403672

‎c_emulator/riscv_softfloat.h

+25
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,10 @@
11
#pragma once
22

3+
unit softfloat_f16add(mach_bits rm, mach_bits v1, mach_bits v2);
4+
unit softfloat_f16sub(mach_bits rm, mach_bits v1, mach_bits v2);
5+
unit softfloat_f16mul(mach_bits rm, mach_bits v1, mach_bits v2);
6+
unit softfloat_f16div(mach_bits rm, mach_bits v1, mach_bits v2);
7+
38
unit softfloat_f32add(mach_bits rm, mach_bits v1, mach_bits v2);
49
unit softfloat_f32sub(mach_bits rm, mach_bits v1, mach_bits v2);
510
unit softfloat_f32mul(mach_bits rm, mach_bits v1, mach_bits v2);
@@ -10,12 +15,19 @@ unit softfloat_f64sub(mach_bits rm, mach_bits v1, mach_bits v2);
1015
unit softfloat_f64mul(mach_bits rm, mach_bits v1, mach_bits v2);
1116
unit softfloat_f64div(mach_bits rm, mach_bits v1, mach_bits v2);
1217

18+
unit softfloat_f16muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3);
1319
unit softfloat_f32muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3);
1420
unit softfloat_f64muladd(mach_bits rm, mach_bits v1, mach_bits v2, mach_bits v3);
1521

22+
unit softfloat_f16sqrt(mach_bits rm, mach_bits v);
1623
unit softfloat_f32sqrt(mach_bits rm, mach_bits v);
1724
unit softfloat_f64sqrt(mach_bits rm, mach_bits v);
1825

26+
unit softfloat_f16toi32(mach_bits rm, mach_bits v);
27+
unit softfloat_f16toui32(mach_bits rm, mach_bits v);
28+
unit softfloat_f16toi64(mach_bits rm, mach_bits v);
29+
unit softfloat_f16toui64(mach_bits rm, mach_bits v);
30+
1931
unit softfloat_f32toi32(mach_bits rm, mach_bits v);
2032
unit softfloat_f32toui32(mach_bits rm, mach_bits v);
2133
unit softfloat_f32toi64(mach_bits rm, mach_bits v);
@@ -26,6 +38,11 @@ unit softfloat_f64toui32(mach_bits rm, mach_bits v);
2638
unit softfloat_f64toi64(mach_bits rm, mach_bits v);
2739
unit softfloat_f64toui64(mach_bits rm, mach_bits v);
2840

41+
unit softfloat_i32tof16(mach_bits rm, mach_bits v);
42+
unit softfloat_ui32tof16(mach_bits rm, mach_bits v);
43+
unit softfloat_i64tof16(mach_bits rm, mach_bits v);
44+
unit softfloat_ui64tof16(mach_bits rm, mach_bits v);
45+
2946
unit softfloat_i32tof32(mach_bits rm, mach_bits v);
3047
unit softfloat_ui32tof32(mach_bits rm, mach_bits v);
3148
unit softfloat_i64tof32(mach_bits rm, mach_bits v);
@@ -36,9 +53,17 @@ unit softfloat_ui32tof64(mach_bits rm, mach_bits v);
3653
unit softfloat_i64tof64(mach_bits rm, mach_bits v);
3754
unit softfloat_ui64tof64(mach_bits rm, mach_bits v);
3855

56+
unit softfloat_f16tof32(mach_bits rm, mach_bits v);
57+
unit softfloat_f16tof64(mach_bits rm, mach_bits v);
3958
unit softfloat_f32tof64(mach_bits rm, mach_bits v);
59+
60+
unit softfloat_f32tof16(mach_bits rm, mach_bits v);
61+
unit softfloat_f64tof16(mach_bits rm, mach_bits v);
4062
unit softfloat_f64tof32(mach_bits rm, mach_bits v);
4163

64+
unit softfloat_f16lt(mach_bits v1, mach_bits v2);
65+
unit softfloat_f16le(mach_bits v1, mach_bits v2);
66+
unit softfloat_f16eq(mach_bits v1, mach_bits v2);
4267
unit softfloat_f32lt(mach_bits v1, mach_bits v2);
4368
unit softfloat_f32le(mach_bits v1, mach_bits v2);
4469
unit softfloat_f32eq(mach_bits v1, mach_bits v2);

0 commit comments

Comments
 (0)