diff --git a/src/coreclr/gc/CMakeLists.txt b/src/coreclr/gc/CMakeLists.txt index b7b79013fc45b4..56956ed25f0496 100644 --- a/src/coreclr/gc/CMakeLists.txt +++ b/src/coreclr/gc/CMakeLists.txt @@ -90,6 +90,7 @@ set (GC_LINK_LIBRARIES ${GC_LINK_LIBRARIES} gc_pal) if(CLR_CMAKE_TARGET_ARCH_AMD64) list(APPEND GC_LINK_LIBRARIES gc_vxsort + minipal ) endif(CLR_CMAKE_TARGET_ARCH_AMD64) diff --git a/src/coreclr/gc/sample/CMakeLists.txt b/src/coreclr/gc/sample/CMakeLists.txt index 1f297fd2313329..2f0181f4a55d09 100644 --- a/src/coreclr/gc/sample/CMakeLists.txt +++ b/src/coreclr/gc/sample/CMakeLists.txt @@ -44,7 +44,9 @@ if(CLR_CMAKE_TARGET_WIN32) ${STATIC_MT_CRT_LIB} ${STATIC_MT_VCRT_LIB} kernel32.lib - advapi32.lib) + advapi32.lib + minipal + ) endif(CLR_CMAKE_TARGET_WIN32) add_definitions(-DVERIFY_HEAP) diff --git a/src/coreclr/gc/vxsort/isa_detection.cpp b/src/coreclr/gc/vxsort/isa_detection.cpp index 93c7288663c42f..b069c8be9bee04 100644 --- a/src/coreclr/gc/vxsort/isa_detection.cpp +++ b/src/coreclr/gc/vxsort/isa_detection.cpp @@ -2,14 +2,10 @@ // The .NET Foundation licenses this file to you under the MIT license. #include "common.h" - -#ifdef TARGET_WINDOWS -#include -#include -#endif - #include "do_vxsort.h" +#include + enum class SupportedISA { None = 0, @@ -17,77 +13,12 @@ enum class SupportedISA AVX512F = 1 << (int)InstructionSet::AVX512F }; -#if defined(TARGET_AMD64) && defined(TARGET_WINDOWS) - -SupportedISA DetermineSupportedISA() -{ - // register definitions to make the following code more readable - enum reg - { - EAX = 0, - EBX = 1, - ECX = 2, - EDX = 3, - COUNT = 4 - }; - - // bit definitions to make code more readable - enum bits - { - OCXSAVE = 1<<27, - AVX = 1<<28, - AVX2 = 1<< 5, - AVX512F = 1<<16, - AVX512DQ = 1<<17, - }; - int reg[COUNT]; - - __cpuid(reg, 0); - if (reg[EAX] < 7) - return SupportedISA::None; - - __cpuid(reg, 1); - - // both AVX and OCXSAVE feature flags must be enabled - if ((reg[ECX] & (OCXSAVE|AVX)) != (OCXSAVE | AVX)) - return SupportedISA::None; - - // get xcr0 register - DWORD64 xcr0 = _xgetbv(0); - - // get OS XState info - DWORD64 FeatureMask = GetEnabledXStateFeatures(); - - // get processor extended feature flag info - __cpuidex(reg, 7, 0); - - // check if all of AVX2, AVX512F and AVX512DQ are supported by both processor and OS - if ((reg[EBX] & (AVX2 | AVX512F | AVX512DQ)) == (AVX2 | AVX512F | AVX512DQ) && - (xcr0 & 0xe6) == 0xe6 && - (FeatureMask & (XSTATE_MASK_AVX | XSTATE_MASK_AVX512)) == (XSTATE_MASK_AVX | XSTATE_MASK_AVX512)) - { - return (SupportedISA)((int)SupportedISA::AVX2 | (int)SupportedISA::AVX512F); - } - - // check if AVX2 is supported by both processor and OS - if ((reg[EBX] & AVX2) && - (xcr0 & 0x06) == 0x06 && - (FeatureMask & XSTATE_MASK_AVX) == XSTATE_MASK_AVX) - { - return SupportedISA::AVX2; - } - - return SupportedISA::None; -} - -#elif defined(TARGET_UNIX) - SupportedISA DetermineSupportedISA() { - __builtin_cpu_init(); - if (__builtin_cpu_supports("avx2")) + int cpuFeatures = minipal_getcpufeatures(); + if ((cpuFeatures & XArchIntrinsicConstants_Avx2) != 0) { - if (__builtin_cpu_supports("avx512f")) + if ((cpuFeatures & XArchIntrinsicConstants_Avx512) != 0) return (SupportedISA)((int)SupportedISA::AVX2 | (int)SupportedISA::AVX512F); else return SupportedISA::AVX2; @@ -98,8 +29,6 @@ SupportedISA DetermineSupportedISA() } } -#endif // defined(TARGET_UNIX) - static bool s_initialized; static SupportedISA s_supportedISA;