Integrate LLVM at llvm/llvm-project@a98c2940dbc0

Updates LLVM usage to match
[a98c2940dbc0](llvm/llvm-project@a98c2940dbc0)

PiperOrigin-RevId: 731312767

bazel/import_llvm.bzl

@@ -7,7 +7,7 @@ load(
 
 def import_llvm(name):
     """Imports LLVM."""
-    LLVM_COMMIT = "9889de834b0a9fa4a5a222a81a524c75977e41d4"
+    LLVM_COMMIT = "a98c2940dbc04bf84de95cb1893694cdcbc4f5fe"
 
     new_git_repository(
         name = name,

patches/llvm.patch

@@ -1 +1,29 @@
 Auto generated patch. Do not edit or delete it, even if empty.
+diff -ruN --strip-trailing-cr a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
+--- a/llvm/lib/CodeGen/RegAllocFast.cpp
++++ b/llvm/lib/CodeGen/RegAllocFast.cpp
+@@ -984,6 +984,7 @@
+
+   LiveRegMap::iterator LRI = findLiveVirtReg(VirtReg);
+   MCPhysReg PhysReg;
++  bool IsRenamable = true;
+   if (LRI != LiveVirtRegs.end() && LRI->PhysReg) {
+     PhysReg = LRI->PhysReg;
+   } else {
+@@ -997,6 +998,7 @@
+       // basic.
+       PhysReg = getErrorAssignment(*LRI, *MO.getParent(), RC);
+       LRI->Error = true;
++      IsRenamable = false;
+     } else
+       PhysReg = AllocationOrder.front();
+   }
+@@ -1007,7 +1009,7 @@
+     MO.setSubReg(0);
+   }
+   MO.setReg(PhysReg);
+-  MO.setIsRenamable(!LRI->Error);
++  MO.setIsRenamable(IsRenamable);
+ }
+
+ /// Variation of defineVirtReg() with special handling for livethrough regs