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top_tb: keep grey box approach & read tmds values directly, fixes #7
1 parent 8053047 commit 416bc3e

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3 files changed

+11
-45
lines changed

3 files changed

+11
-45
lines changed

test/top_tb/top_tb.sv

+5-35
Original file line numberDiff line numberDiff line change
@@ -3,24 +3,10 @@
33
module top_tb();
44

55
initial begin
6-
$dumpvars(0, top_tb);
7-
// #36036000000ps $finish; // Terminate simulation after ~2 frames are generated
86
#20ms $finish;
97
end
108

11-
logic clk_original = 0;
12-
logic [2:0] tmds_p;
13-
logic tmds_clock_p;
14-
logic [2:0] tmds_n;
15-
logic tmds_clock_n;
16-
17-
top top (
18-
.clk_original(clk_original),
19-
.tmds_p(tmds_p),
20-
.tmds_clock_p(tmds_clock_p),
21-
.tmds_n(tmds_n),
22-
.tmds_clock_n(tmds_clock_n)
23-
);
9+
top top ();
2410

2511
logic [9:0] cx = 858 - 4;
2612
logic [9:0] cy = 524;
@@ -62,27 +48,11 @@ generate
6248
end
6349
endgenerate
6450

65-
logic [3:0] counter = 0;
66-
always @(posedge top.clk_pixel_x10)
51+
always @(posedge top.clk_pixel)
6752
begin
68-
assert (counter == top.hdmi.tmds_counter) else $fatal("Shift-out counter doesn't match decoder counter");
69-
if (counter == 9)
70-
begin
71-
counter <= 0;
72-
end
73-
else
74-
counter <= counter + 1'd1;
75-
76-
tmds_values[0][counter] <= tmds_p[0];
77-
tmds_values[1][counter] <= tmds_p[1];
78-
tmds_values[2][counter] <= tmds_p[2];
79-
80-
if (counter == 0)
81-
begin
82-
tmds_values[0][9:1] <= 9'dX;
83-
tmds_values[1][9:1] <= 9'dX;
84-
tmds_values[2][9:1] <= 9'dX;
85-
end
53+
tmds_values[0] <= top.hdmi.tmds[0];
54+
tmds_values[1] <= top.hdmi.tmds[1];
55+
tmds_values[2] <= top.hdmi.tmds[2];
8656
end
8757

8858
logic [4:0] data_counter = 0;

top/pll.v

-1
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,6 @@
33
`timescale 1 ns / 100 ps
44

55
module pll (
6-
input wire inclk0,
76
output reg c0 = 0,
87
output reg c1 = 1,
98
output reg c2 = 0

top/top.sv

+6-9
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,14 @@
1-
module top (
2-
input logic clk_original,
3-
4-
output logic [2:0] tmds_p,
5-
output logic tmds_clock_p,
6-
output logic [2:0] tmds_n,
7-
output logic tmds_clock_n
8-
);
1+
module top ();
2+
logic [2:0] tmds_p;
3+
logic tmds_clock_p;
4+
logic [2:0] tmds_n;
5+
logic tmds_clock_n;
96

107
logic clk_pixel;
118
logic clk_pixel_x10;
129
logic clk_audio;
1310

14-
pll pll(.inclk0(clk_original), .c0(clk_pixel_x10), .c1(clk_pixel), .c2(clk_audio));
11+
pll pll(.c0(clk_pixel_x10), .c1(clk_pixel), .c2(clk_audio));
1512

1613
logic signed [15:0] audio_sample_word = 16'sd0; // Since the L-PCM audio is 2-channel by default, this is mono audio.
1714
always @(posedge clk_audio) // Sawtooth wave generator

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