pcm-pcie.x result seems not right #68
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hi ! I tried pcm-pcie.x on my
Then I tried on another
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Replies: 5 comments
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Hi @cooljiansir, Thanks for reporting. I see two issues to be addressed in pcm-pcie program.
To answer 1) Currently, PCIe Rd (B) is estimating bandwidth using sum(PCIeRdCur + CRd + DRd) * 64. CRd and DRd are generally traffics coming from CPU (sometimes service IO requests when BIOS changes PCIe Read to use CRd or DRd coherent flow). We will drop the CRd and DRd from PCIe Rd bandwidth calculation, so CPU traffic will not be estimated in the future. To answer 2) I think there is a bug that skylake version of pcm-pcie.x is reporting "DDIO miss" bandwidth only by default. Can you please try ./pcm-pcie.x -e and see if you see most of traffic? We'll fix the default bandwidth display in the next release. |
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Thanks for your reply : )
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@xerothermic I found that |
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Hi zhijian,
Yes, that is correct. Would you mind to submit a PR if you think you can do it?
Thanks,
Patrick
… On Apr 8, 2018, at 01:50, zhijian ***@***.***> wrote:
@xerothermic I found that ItoM (Total) is smaller than ItoM (Miss), I'm wondering if we should add the result of PCM::programPCIeMissCounters and PCM::programPCIeCounters?
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hi @xerothermic,I have another question about the hit and miss: on some of my sever, miss counter seems to include hit counter, but some other sever not. So how can we get the total bandwidth?(hit + miss or max(hit, miss)?) |
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Hi @cooljiansir,
Thanks for reporting. I see two issues to be addressed in pcm-pcie program.
To answer 1) Currently, PCIe Rd (B) is estimating bandwidth using sum(PCIeRdCur + CRd + DRd) * 64. CRd and DRd are generally traffics coming from CPU (sometimes service IO requests when BIOS changes PCIe Read to use CRd or DRd coherent flow). We will drop the CRd and DRd from PCIe Rd bandwidth calculation, so CPU traffic will not be estimated in the future.
To answer 2) I think there is a bug that skylake version of pcm-pcie.x is repor…