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Update README.md; changed github URL
TPP-MLIR Base Tests #663: Pull request #1007 opened by alheinecke
February 8, 2025 07:37 3m 23s nfc_readme
February 8, 2025 07:37 3m 23s
Update README.md; changed github URL
TPP-MLIR Base Tests #662: Commit efb5a6b pushed by alheinecke
February 8, 2025 07:37 3m 32s nfc_readme
February 8, 2025 07:37 3m 32s
bump libxsmm
TPP-MLIR Base Tests #661: Commit 400a833 pushed by alheinecke
February 8, 2025 07:25 3m 7s fix_bump_libxsmm
February 8, 2025 07:25 3m 7s
Enable vector to amx code generation and execution using libxsmm plat…
TPP-MLIR Base Tests #660: Pull request #1006 opened by shahidact
February 5, 2025 08:07 3m 7s shahidact:amx
February 5, 2025 08:07 3m 7s
Brgemm register tiling for bf16 type
TPP-MLIR Benchmarks #310: Pull request #1005 labeled by arun-thmn
February 3, 2025 15:01 7m 1s arun-thmn:tiling-bf16-support
February 3, 2025 15:01 7m 1s
Brgemm register tiling for bf16 type
TPP-MLIR Base Tests #659: Pull request #1005 synchronize by arun-thmn
February 3, 2025 14:54 3m 32s arun-thmn:tiling-bf16-support
February 3, 2025 14:54 3m 32s
Brgemm register tiling for bf16 type
TPP-MLIR Base Tests #658: Pull request #1005 synchronize by arun-thmn
February 3, 2025 03:34 3m 54s arun-thmn:tiling-bf16-support
February 3, 2025 03:34 3m 54s
Brgemm register tiling for bf16 type
TPP-MLIR Benchmarks #309: Pull request #1005 labeled by arun-thmn
February 3, 2025 03:18 7m 0s arun-thmn:tiling-bf16-support
February 3, 2025 03:18 7m 0s
Brgemm register tiling for bf16 type
TPP-MLIR Base Tests #657: Pull request #1005 opened by arun-thmn
February 3, 2025 03:15 3m 9s arun-thmn:tiling-bf16-support
February 3, 2025 03:15 3m 9s
AVX2/SVE benchmarks for vector-to-kernels and user option design chan…
TPP-MLIR Base Tests #656: Commit fecd114 pushed by arun-thmn
January 29, 2025 16:04 3m 5s main
January 29, 2025 16:04 3m 5s
AVX2/SVE benchmarks for vector-to-kernels and user option design chan…
TPP-MLIR Benchmarks #308: Commit fecd114 pushed by arun-thmn
January 29, 2025 16:04 7m 5s main
January 29, 2025 16:04 7m 5s
AVX2/SVE benchmarks for vector-to-kernels and user option design change
TPP-MLIR Base Tests #655: Pull request #1002 synchronize by arun-thmn
January 29, 2025 10:12 2m 58s arun-thmn:ci-new-benchmarks
January 29, 2025 10:12 2m 58s
AVX2/SVE benchmarks for vector-to-kernels and user option design change
TPP-MLIR Base Tests #654: Pull request #1002 synchronize by arun-thmn
January 29, 2025 09:54 3m 41s arun-thmn:ci-new-benchmarks
January 29, 2025 09:54 3m 41s
AVX2/SVE benchmarks for vector-to-kernels and user option design change
TPP-MLIR Base Tests #653: Pull request #1002 synchronize by arun-thmn
January 29, 2025 09:37 3m 21s arun-thmn:ci-new-benchmarks
January 29, 2025 09:37 3m 21s
[CI] Add CLX build and make use of new benchmark-all tag (#1004)
TPP-MLIR Benchmarks #302: Commit 8a916d5 pushed by rengolin
January 28, 2025 12:46 6m 44s main
January 28, 2025 12:46 6m 44s
[CI] Add CLX build and make use of new benchmark-all tag (#1004)
TPP-MLIR Base Tests #650: Commit 8a916d5 pushed by rengolin
January 28, 2025 12:46 3m 54s main
January 28, 2025 12:46 3m 54s
[CI] Add CLX build and make use of new benchmark-all tag
TPP-MLIR Benchmarks #301: Pull request #1004 labeled by rengolin
January 28, 2025 12:38 6m 49s actions
January 28, 2025 12:38 6m 49s