More renames + fixes

libxsmm · Feb 18, 2025 · 88f1c8a · 88f1c8a
1 parent 630ad41
commit 88f1c8a
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Showing 11 changed files with 26 additions and 24 deletions.
diff --git a/lib/TPP/Conversion/ConvertLinalgToXsmm/ConvertLinalgToXsmm.cpp b/lib/TPP/Conversion/ConvertLinalgToXsmm/ConvertLinalgToXsmm.cpp
@@ -585,7 +585,7 @@ static FailureOr<BrgemmInfo> checkAccess(linalg::LinalgOp linalgOp, unsigned m,
     strideB = (*stridesOnB)[*batchPosCodomainB];
   }
 
-  auto loops = linalgOp.computeStaticLoopSizes();
+  auto loops = linalgOp.getStaticLoopRanges();
   int64_t batchVal = (batchPos) ? loops[batchPos.value()] : 0;
 
   bool isVnni = vnni::utils::isInVnniLayout(linalgOp);

diff --git a/lib/TPP/GPU/GpuConversion.cpp b/lib/TPP/GPU/GpuConversion.cpp
@@ -58,7 +58,7 @@ struct GpuConversion : public tpp::impl::GpuConversionBase<GpuConversion>,
   void constructPipeline() override {
     // Map loops into GPU kernels.
     pm.addNestedPass<func::FuncOp>(createGpuMapParallelLoopsPass());
-    pm.addNestedPass<func::FuncOp>(createParallelLoopToGpuPass());
+    pm.addNestedPass<func::FuncOp>(createConvertParallelLoopToGpuPass());
     pm.addPass(createCleanup());
 
     // First lower linalg using custom patterns then fall back to

diff --git a/lib/TPP/GPU/LinalgToXeGPU.cpp b/lib/TPP/GPU/LinalgToXeGPU.cpp
@@ -884,7 +884,7 @@ static LogicalResult createDPASKernel(linalg::LinalgOp linalgOp,
 
   // DPAS only works with F32 accumulators.
   auto dpasResType =
-      VectorType::get(dpasTypeC.getShape(), FloatType::getF32(ctx));
+      VectorType::get(dpasTypeC.getShape(), Float32Type::get(ctx));
 
   // Extend the accumulation values if needed.
   auto convOutPrecision = !typeC.getElementType().isF32();

diff --git a/lib/TPP/Transforms/Bufferize.cpp b/lib/TPP/Transforms/Bufferize.cpp
@@ -158,7 +158,7 @@ void Bufferize::runOnOperation() {
     bufferization::buildBufferDeallocationPipeline(passManager, options);
   }
 
-  passManager.addPass(createBufferizationToMemRefPass());
+  passManager.addPass(createConvertBufferizationToMemRefPass());
   if (failed(runPipeline(passManager, moduleOp)))
     return signalPassFailure();
 }

diff --git a/lib/TPP/Transforms/IntelAMXTileConfig.cpp b/lib/TPP/Transforms/IntelAMXTileConfig.cpp
@@ -93,7 +93,7 @@ struct IntelAMXTileConfig : OpRewritePattern<InvokeOpTy> {
     auto alloca = rewriter.create<memref::AllocaOp>(
         op.getLoc(), MemRefType::get({64}, rewriter.getI8Type()));
 
-    ValueRange tileConfigInputs{alloca};
+    SmallVector<Value> tileConfigInputs{alloca};
     rewriter.create<mlir::xsmm::IntelAMXTileConfigOp>(
         op.getLoc(), tileConfigSetup, tileConfigInputs);
 
@@ -107,7 +107,7 @@ struct IntelAMXTileConfig : OpRewritePattern<InvokeOpTy> {
         xsmm::utils::getDataType(rewriter, op.getOperand(1).getType()),
         invokeOperands);
 
-    ValueRange tileResetInputs{alloca};
+    SmallVector<Value> tileResetInputs{alloca};
     rewriter.create<mlir::xsmm::IntelAMXTileConfigOp>(
         op.getLoc(), tileConfigReset, tileResetInputs);
 

diff --git a/lib/TPP/Transforms/LowerPacksAndUnpacks.cpp b/lib/TPP/Transforms/LowerPacksAndUnpacks.cpp
@@ -112,7 +112,7 @@ static void fuseOrTilePacks(RewriterBase &rewriter, FunctionOpInterface func) {
             forLoops);
     if (!fusedProducer)
       continue;
-    rewriter.replaceOp(consumerPackOp, tilingResult->replacements);
+    rewriter.replaceOp(consumerPackOp, tilingResult->mergeResult.replacements);
   }
 
   // Tile packs.
@@ -124,7 +124,7 @@ static void fuseOrTilePacks(RewriterBase &rewriter, FunctionOpInterface func) {
         rewriter, cast<TilingInterface>(packOp.getOperation()), tileSizes);
     if (failed(tilingResult))
       continue;
-    rewriter.replaceOp(packOp, tilingResult->replacements);
+    rewriter.replaceOp(packOp, tilingResult->mergeResult.replacements);
   }
 
   // Tile unpacks.
@@ -136,7 +136,7 @@ static void fuseOrTilePacks(RewriterBase &rewriter, FunctionOpInterface func) {
         rewriter, cast<TilingInterface>(unPackOp.getOperation()), tileSizes);
     if (failed(tilingResult))
       continue;
-    rewriter.replaceOp(unPackOp, tilingResult->replacements);
+    rewriter.replaceOp(unPackOp, tilingResult->mergeResult.replacements);
   }
 }
 
@@ -215,7 +215,7 @@ class LowerPacksAndUnPacks
             unpackTilingOptions);
         if (failed(tilingResult))
           return signalPassFailure();
-        rewriter.replaceOp(unPackOp, tilingResult->replacements);
+        rewriter.replaceOp(unPackOp, tilingResult->mergeResult.replacements);
       });
       getOperation()->walk([&](linalg::PackOp packOp) {
         SmallVector<int64_t> tiles(packOp.getSourceType().getRank(), 1);
@@ -226,7 +226,7 @@ class LowerPacksAndUnPacks
             packTilingOptions);
         if (failed(tilingResult))
           return signalPassFailure();
-        rewriter.replaceOp(packOp, tilingResult->replacements);
+        rewriter.replaceOp(packOp, tilingResult->mergeResult.replacements);
       });
       RewritePatternSet patterns(&getContext());
       patterns.add<linalg::DecomposeOuterUnitDimsUnPackOpPattern,

diff --git a/lib/TPP/Transforms/LowerPacksAndUnpacksWithoutTranspose.cpp b/lib/TPP/Transforms/LowerPacksAndUnpacksWithoutTranspose.cpp
@@ -42,7 +42,7 @@ namespace {
 void lowerPackAndFoldTranspose(linalg::PackOp packOp,
                                linalg::GenericOp genericOp, uint operandIdx,
                                PatternRewriter &rewriter) {
-  auto packInversionPerm = tensor::getPackInverseDestPerm(packOp);
+  auto packInversionPerm = linalg::getPackInverseDestPerm(packOp);
 
   auto res = linalg::lowerPack(rewriter, packOp);
 

diff --git a/lib/TPP/Transforms/RewriteBatchMatmulToMatmul.cpp b/lib/TPP/Transforms/RewriteBatchMatmulToMatmul.cpp
@@ -111,7 +111,7 @@ struct RewriteBatchMatmulToMatmul
           tilingOpts);
       if (failed(tilingResult))
         return signalPassFailure();
-      rewriter.replaceOp(batchMatmulOp, tilingResult->replacements);
+      rewriter.replaceOp(batchMatmulOp, tilingResult->mergeResult.replacements);
     });
 
     // Step2:

diff --git a/lib/TPP/Transforms/SplitReductionDim.cpp b/lib/TPP/Transforms/SplitReductionDim.cpp
@@ -81,7 +81,7 @@ struct SplitContractionReduction
       return rewriter.notifyMatchFailure(linalgOp,
                                          "failed to tile contraction");
 
-    rewriter.replaceOp(linalgOp, tilingResult->replacements);
+    rewriter.replaceOp(linalgOp, tilingResult->mergeResult.replacements);
 
     return success();
   }

diff --git a/lib/TPP/Transforms/ToBlockLayoutAndBack.cpp b/lib/TPP/Transforms/ToBlockLayoutAndBack.cpp
@@ -674,7 +674,7 @@ struct PackVNNI : public tpp::impl::PackVNNIBase<PackVNNI> {
     RewritePatternSet patterns(ctx);
     linalg::populateLinalgDeGeneralizationPatterns(patterns);
     patterns.add<VNNIOnMatmul, VNNIOnBRGemm>(ctx);
-    tensor::populateSimplifyPackAndUnpackPatterns(patterns);
+    linalg::populateSimplifyPackAndUnpackPatterns(patterns);
     (void)applyPatternsGreedily(getOperation(), std::move(patterns));
   }
 };
@@ -831,7 +831,7 @@ struct SimplifyAndCanonicalizePack
 
 void mlir::tpp::populateSimplifyPacking(RewritePatternSet &patterns) {
   MLIRContext *ctx = patterns.getContext();
-  tensor::populateSimplifyPackAndUnpackPatterns(patterns);
+  linalg::populateSimplifyPackAndUnpackPatterns(patterns);
   tensor::populateFoldTensorEmptyPatterns(patterns);
   linalg::PackOp::getCanonicalizationPatterns(patterns, ctx);
   linalg::UnPackOp::getCanonicalizationPatterns(patterns, ctx);

diff --git a/lib/TPP/Transforms/TransformUtils.cpp b/lib/TPP/Transforms/TransformUtils.cpp
@@ -138,14 +138,16 @@ Value getSliceOperand(OpBuilder &builder, linalg::LinalgOp linalgOp,
   assert(rank == strides.size() && "expect rank == strides");
 
   Location loc = linalgOp.getLoc();
-  Type reducedType =
-      (linalgOp.hasPureTensorSemantics())
-          ? tensor::ExtractSliceOp::inferCanonicalRankReducedResultType(
-                desiredResultRank, cast<RankedTensorType>(operandType), offsets,
-                sizes, strides)
-          : memref::SubViewOp::inferRankReducedResultType(
-                getExpectedResultMemRefShape(sizes, desiredResultRank),
-                cast<MemRefType>(operandType), offsets, sizes, strides);
+  Type reducedType;
+  if (linalgOp.hasPureTensorSemantics()) {
+    reducedType = tensor::ExtractSliceOp::inferCanonicalRankReducedResultType(
+        desiredResultRank, cast<RankedTensorType>(operandType), offsets, sizes,
+        strides);
+  } else {
+    reducedType = memref::SubViewOp::inferRankReducedResultType(
+        getExpectedResultMemRefShape(sizes, desiredResultRank),
+        cast<MemRefType>(operandType), offsets, sizes, strides);
+  }
 
   Operation *extractOperation =
       (linalgOp.hasPureTensorSemantics())