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Oni v2 (#68)
* Draft for version 2 of the ONI spec - Reorganized controller into separate pages - Introduce procedures for variable word alignments in high-bw streams - Modified register access to allow queued transactions - Introduce the possibility of optional features - Added an expanded address map * Fix titles * Add address space overview * Rewrite channel access concurrency description * Split device page * Remove grammatically erroneous commas * Remove special devices section from hubs Redundant since it is on its own file. * Fix duplicate sections and text - Special devices was duplicated - Device descriptor was duplicated * Clarify text for hub clocks * Update text related to hub clocks * Update device sample definitions - Change hub conter name - Split write and read frames * Clarify text for concurrent access * Manually "rebase" branches issue-1 and issue-3 on oni-v2 - An actual rebase was too difficult, so I brought those branches over manually * Address review comments * Address review comments * Update data frame format to C-style * Clarify acquisition counter definition * Reference network topology on hierarchy page - Reference the formal concept of a network topology and note that ONI hardware is arranged in a tiered star similar to USB * Address review comments * Clarify the meaning of the Trigger register - Add and note to clarify the precise meaning of the Trigger register within the device register programming interface on the controller. * Improve register maps - Name controller registers - Name hub info device registers - specift gub info device address map - add hub datasheet requirement - clarify optional controller features * Add link to latency register in acquisition counter admonition * Reword device channel list * Clarify register description - Add glossary term for registers - Specify cotroller and device registers con channel types page * Address review on addresses.rst * Address review comments * Address further reviews to issues-40-42 * Address reviews in issue 39 * Style pass: All titles must be camel case * Style pass: read/write * Style pass: grammar, spelling, formatting, etc. * Full read through of spec - Looked over the spec as a complete document and created issues for things I felt unsure about - Some formatting changes and minor textual changes for grammer, clarity, etc * Added 'tomli' to lock file --------- Co-authored-by: Aaron Cuevas Lopez <[email protected]> Co-authored-by: jonnew <[email protected]>
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Pipfile

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[packages]
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sphinx = "*"
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pydata-sphinx-theme = "0.13.3"
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linuxdoc = "*"
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sphinx-tabs = "*"
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make = "*"
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breathe = "*"

Pipfile.lock

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source/api/bindings/clroni/doxygen-xml/classoni_1_1_context.xml

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<parametername><ref refid="classoni_1_1_o_n_i_exception" kindref="compound">ONIException</ref></parametername>
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</parameternamelist>
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<parameterdescription>
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<para>Thrown when there is an error during hardware initialization (e.g. an invalid device table).</para>
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<para>Thrown when there is an error during hardware initialization (e.g., an invalid device table).</para>
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</parameterdescription>
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</parameteritem>
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</parameterlist>

source/api/bindings/clroni/doxygen-xml/classoni_1_1_hub.xml

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<argsstring></argsstring>
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<name>HardwareID</name>
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<briefdescription>
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<para>ONIX hub hardware ID (e.g. host or headstage type). </para>
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<para>ONIX hub hardware ID (e.g., host or headstage type). </para>
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</briefdescription>
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<detaileddescription>
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</detaileddescription>

source/api/liboni/liboni-example.rst

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@@ -179,7 +179,7 @@ bandwidths, and required response latencies. The buffer sizes default to the
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minimum size for a given device table (the maximum frame read and write sizes
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across devices in the table aligned to the bus width of hardware communication
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link). This provides the lowest latency, but is optimal only for very low
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bandwidth acquisition and deterministic and low-latency threads (e.g. those
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bandwidth acquisition and deterministic and low-latency threads (e.g., those
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found on real-time operating system). On a normal computer, these buffers can
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be set manually to optimize the bandwidth/latency trade off. For example, to
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set the buffer read and write sizes to 1024 and 8192 bytes respectively, use
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********************************************
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:struct:`oni_frame_t`'s are minimal packets containing metadata and raw binary
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data blocks from a single device within the device table. A
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:struct:`oni_size_t` is defined as
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:struct:`oni_frame_t` is defined as
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.. code-block:: c
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struct oni_frame {
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const uint64_t dev_idx; // Device index that produced or accepts the frame
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const uint32_t data_sz; // Size in bytes of data buffer
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const uint64_t time; // Frame time (ACQCLKHZ)
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uint8_t *data; // Raw data block
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struct oni_frame_t {
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const oni_size_t dev_idx; // Device index that produced or accepts the frame
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const oni_size_t data_sz; // Size in bytes of data buffer
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const oni_counter_t acqclk_cnt; // Acquisition clock (ACQCLKHZ) count at frame creation
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uint8_t *data; // Raw data block
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};
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where ``dev_idx`` is the fully qualified device index within the device table
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(hub.index), ``data_sz`` is the size in bytes of the raw data block, ``time``
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is the system clock count that indicates the frame creation time, and, ``data``
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is a pointer to the raw data block. A single frame can be read from an
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acquisition context after it is started (see :ref:`start_ctx`) using repeated
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calls to ``oni_read_frame`` as follows:
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(hub.index), ``data_sz`` is the size in bytes of the raw data block,
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``acqclk_cnt`` is the acquisition clock count that indicates the frame creation
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time, and, ``data`` is a pointer to the raw data block. A single frame can be
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read from an acquisition context after it is started (see :ref:`start_ctx`)
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using repeated calls to ``oni_read_frame`` as follows:
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.. code-block:: c
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// Required elements to create frame
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oni_frame_t *frame = NULL;
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size_t dev_idx = 256;
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size_t data_sz = 8; // or 16, 24, 32, etc
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char data[] = {0, 1, 2, 3, 4, 5, 6, 7};
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const size_t dev_idx = 256;
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const size_t data_sz = 8; // Multiple of write size presented in device table
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char data[] = {0, 1, 2, 3, 4, 5, 6, 7}; // Must be data_sz bytes long
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// Create a frame
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oni_create_frame(ctx, &frame, dev_idx, data, data_sz);
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oni_destroy_frame(frame);
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First, a frame is created using a call to ``oni_create_frame`` (analogous to
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``oni_read_frame``, except that frame data is provided by the user instead of
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the hardware). In the preceding example, it is assumed that the user has
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``oni_read_frame``, except that frame data is provided by the caller instead of
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the hardware). In the preceding example, it is assumed that the caller has
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queried the device table to ensure that the device with qualified index 256 is
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writable and has a write size of 8 bytes. If the device at ``dev_idx`` does not
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accept writes or ``data``/``data_sz`` are not a multiple of the device write

source/api/liboni/oni.rst

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---------------------------------------
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.. struct:: oni_frame_t
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.. member:: const oni_fifo_time_t time
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Frame time (:macro:`ONI_OPT_ACQCLKHZ` host clock counter).
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.. member:: const oni_fifo_dat_t dev_idx
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.. member:: const oni_size_t dev_idx
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Device index that produced or accepts the frame.
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.. member:: const oni_counter_t acqclk_cnt
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Acquisition clock (:macro:`ONI_OPT_ACQCLKHZ`) count at the time
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of frame creation.
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.. member:: const oni_fifo_dat_t data_sz
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Size of data in bytes.
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.. member:: uint8_t *data
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Raw data block. This pointer is a zero-copy "view" into a private,
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referenced-counted buffer managed by the acquisition context. The
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handle to this buffer is hidden by the API using some C ``union``
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magic.
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Pointer to a ``data_sz``-byte continuous data block.
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An ONI-compliant data frame implementation. :struct:`oni_frame_t`'s are
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produced by calls to :func:`oni_read_frame` and consumed by calls to
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Change the value of a configuration register from specific devices within
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the current device table. This can be used to change the functionality of
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devices, e.g. set filter bandwidth, select active channels, or change
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devices, e.g., set filter bandwidth, select active channels, or change
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stimulation parameters. Register specifications (addresses, read- and
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write-access, acceptable values, and descriptions) are provided on the
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:ref:`ONI-device datasheet <dev-datasheet>`.
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:ref:`liboni_example_set_buffers`). :struct:`oni_frame_t`'s created during
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calls to :func:`oni_read_frame` are zero-copy views into this buffer.
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.. attention:: It is the user's responsibility to free the resources allocated by
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.. attention:: It is the caller's responsibility to free the resources allocated by
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this call by passing the resulting frame pointer to
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:func:`oni_destroy_frame`.
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Create an :struct:`oni_frame_t` for consumption by :func:`oni_write_frame`.
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.. attention:: It is the user's responsibility to free the resources allocated by
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.. attention:: It is the caller's responsibility to free the resources allocated by
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this call by passing the resulting frame pointer to
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:func:`oni_destroy_frame`
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source/api/liboni/onidefs.rst

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Integer Types
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---------------------------------------
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.. warning:: All of these types will be almost certainly be deprecated in
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future API revisions to handle drivers with different channel bit widths.
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.. type:: uint32_t oni_size_t
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Data sizes are 32-bit uints.
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Registers have 32-bit values.
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.. type:: uint32_t oni_fifo_dat_t
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FIFOs use 32-bit words.
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.. type:: uint64_t oni_fifo_time_t
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.. type:: uint64_t oni_counter_t
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FIFO bound timers use 64-bit words.
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Counters use 64-bit words.
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.. _onidef_context_options:
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source/api/liboni/onix.rst

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.. attention:: Many of the devices in this enumeration have no ready-made route
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to use in high-level software. This is true for a variety of reasons. For
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instance, they may be prototype hardware or test fixture that we wish to
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maintain for backward compatibility (e.g. :macro:`ONIX_TESTREG0`). Or, they
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may be a low level device (e.g. :macro:`ONIX_AD7617`) that is used in the
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maintain for backward compatibility (e.g., :macro:`ONIX_TESTREG0`). Or, they
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may be a low level device (e.g., :macro:`ONIX_AD7617`) that is used in the
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background by other, higher order devices in the list (e.g.
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:macro:`ONIX_FMCANALOG1R3`).
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source/conf.py

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'sphinx.ext.githubpages',
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'breathe',
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'sphinx_csharp',
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'linuxdoc.rstFlatTable'
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]
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# Add any paths that contain templates here, relative to this directory.
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templates_path = ["_templates"]

source/hw-spec/comm_channels.rst

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Stream Channel
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A unidirectional, asynchronous channel of continuous, N-bit word data along
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with a signal indicating if it is ready to send/receive data. Two
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directions are defined:
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with a signal indicating if it is ready to send/receive data. Two directions
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are defined:
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:Read: Streams that transmit data from a device to the host computer.
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:Write: Streams that transmit data to a device from the host computer.
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Register Channel
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A synchronous, bidirectional, N-bit, addressed digital bus. Each address is
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a 32-bit value. Registers can be Read-only, Write-only or Read-Write. This
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channel also has signals to indicate a successful or failed completion of a
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register access operation. (e.g., An access to an non-existent address or a
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non-allowed operation will return an error.)
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A synchronous, bidirectional, addressed digital bus to access
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:term:`registers<Register>`. Registers can be Read-only, Write-only or
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Read/Write. Channels of this type MUST indicate a successful or failed
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completion of a register access operation. (e.g., an access to a
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non-existent address or a non-allowed operation will signal an error.)
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.. note:: Both the controller and the devices can hold registers. Controller registers are
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arranged in a fixed :ref:`address map<addresses>` and accessed through the
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:ref:`configuration channel<conf-chan>`. :ref:`Device registers<dev-register>`
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follow the address map defined on each device :ref:`datasheet<dev-datasheet>`
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and are accessed through the :ref:`device register interface<register_interface>`.
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