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Merge pull request eclipse-omr#6577 from kevindean12/extend-regcan
Allow extensions to GlobalRegisterAllocator
2 parents 4d33c31 + 7383012 commit 1a20c5d

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43 files changed

+1432
-1171
lines changed

‎compiler/aarch64/codegen/OMRCodeGenerator.cpp

+3-3
Original file line numberDiff line numberDiff line change
@@ -492,16 +492,16 @@ void OMR::ARM64::CodeGenerator::buildRegisterMapForInstruction(TR_GCStackMap *ma
492492
map->setInternalPointerMap(internalPtrMap);
493493
}
494494

495-
TR_GlobalRegisterNumber OMR::ARM64::CodeGenerator::pickRegister(TR_RegisterCandidate *regCan,
495+
TR_GlobalRegisterNumber OMR::ARM64::CodeGenerator::pickRegister(TR::RegisterCandidate *regCan,
496496
TR::Block **barr,
497497
TR_BitVector &availRegs,
498498
TR_GlobalRegisterNumber &highRegisterNumber,
499-
TR_LinkHead<TR_RegisterCandidate> *candidates)
499+
TR_LinkHead<TR::RegisterCandidate> *candidates)
500500
{
501501
return OMR::CodeGenerator::pickRegister(regCan, barr, availRegs, highRegisterNumber, candidates);
502502
}
503503

504-
bool OMR::ARM64::CodeGenerator::allowGlobalRegisterAcrossBranch(TR_RegisterCandidate *regCan, TR::Node *branchNode)
504+
bool OMR::ARM64::CodeGenerator::allowGlobalRegisterAcrossBranch(TR::RegisterCandidate *regCan, TR::Node *branchNode)
505505
{
506506
// If return false, processLiveOnEntryBlocks has to dis-qualify any candidates which are referenced
507507
// within any CASE of a SWITCH statement.

‎compiler/aarch64/codegen/OMRCodeGenerator.hpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -344,14 +344,14 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGenerator
344344
* @param[in] candidates : candidates already assigned
345345
* @return register number
346346
*/
347-
TR_GlobalRegisterNumber pickRegister(TR_RegisterCandidate *regCan, TR::Block **barr, TR_BitVector &availableRegisters, TR_GlobalRegisterNumber &highRegisterNumber, TR_LinkHead<TR_RegisterCandidate> *candidates);
347+
TR_GlobalRegisterNumber pickRegister(TR::RegisterCandidate *regCan, TR::Block **barr, TR_BitVector &availableRegisters, TR_GlobalRegisterNumber &highRegisterNumber, TR_LinkHead<TR::RegisterCandidate> *candidates);
348348
/**
349349
* @brief Allows global register across branch or not
350350
* @param[in] regCan : register candidate
351351
* @param[in] branchNode : branch node
352352
* @return true when allowed, false otherwise
353353
*/
354-
bool allowGlobalRegisterAcrossBranch(TR_RegisterCandidate *regCan, TR::Node * branchNode);
354+
bool allowGlobalRegisterAcrossBranch(TR::RegisterCandidate *regCan, TR::Node * branchNode);
355355
/**
356356
* @brief Gets the maximum number of GPRs allowed across edge
357357
* @param[in] node : node

‎compiler/arm/codegen/OMRCodeGenerator.cpp

+3-3
Original file line numberDiff line numberDiff line change
@@ -588,11 +588,11 @@ TR_ARMOutOfLineCodeSection *OMR::ARM::CodeGenerator::findOutLinedInstructionsFro
588588
return NULL;
589589
}
590590

591-
TR_GlobalRegisterNumber OMR::ARM::CodeGenerator::pickRegister(TR_RegisterCandidate *regCan,
591+
TR_GlobalRegisterNumber OMR::ARM::CodeGenerator::pickRegister(TR::RegisterCandidate *regCan,
592592
TR::Block ** barr,
593593
TR_BitVector & availRegs,
594594
TR_GlobalRegisterNumber & highRegisterNumber,
595-
TR_LinkHead<TR_RegisterCandidate> * candidates)
595+
TR_LinkHead<TR::RegisterCandidate> * candidates)
596596
{
597597
// Tactical GRA
598598
// We delegate the decision to use register pressure simulation to common code.
@@ -601,7 +601,7 @@ TR_GlobalRegisterNumber OMR::ARM::CodeGenerator::pickRegister(TR_RegisterCandida
601601
// }
602602
}
603603

604-
bool OMR::ARM::CodeGenerator::allowGlobalRegisterAcrossBranch(TR_RegisterCandidate *rc, TR::Node * branchNode)
604+
bool OMR::ARM::CodeGenerator::allowGlobalRegisterAcrossBranch(TR::RegisterCandidate *rc, TR::Node * branchNode)
605605
{
606606
// If return false, processLiveOnEntryBlocks has to dis-qualify any candidates which are referenced
607607
// within any CASE of a SWITCH statement.

‎compiler/arm/codegen/OMRCodeGenerator.hpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -176,8 +176,8 @@ class OMR_EXTENSIBLE CodeGenerator : public OMR::CodeGenerator
176176

177177

178178
// This is needed by register simulation pickRegister in CodeGenRA common code.
179-
TR_GlobalRegisterNumber pickRegister(TR_RegisterCandidate *, TR::Block * *, TR_BitVector & availableRegisters, TR_GlobalRegisterNumber & globalRegisterNumber, TR_LinkHead<TR_RegisterCandidate> *candidates);
180-
bool allowGlobalRegisterAcrossBranch(TR_RegisterCandidate *, TR::Node * branchNode);
179+
TR_GlobalRegisterNumber pickRegister(TR::RegisterCandidate *, TR::Block * *, TR_BitVector & availableRegisters, TR_GlobalRegisterNumber & globalRegisterNumber, TR_LinkHead<TR::RegisterCandidate> *candidates);
180+
bool allowGlobalRegisterAcrossBranch(TR::RegisterCandidate *, TR::Node * branchNode);
181181
using OMR::CodeGenerator::getMaximumNumberOfGPRsAllowedAcrossEdge;
182182
int32_t getMaximumNumberOfGPRsAllowedAcrossEdge(TR::Node *);
183183
int32_t getMaximumNumberOfFPRsAllowedAcrossEdge(TR::Node *);

‎compiler/codegen/CodeGenRA.cpp

+23-23
Original file line numberDiff line numberDiff line change
@@ -1041,7 +1041,7 @@ OMR::CodeGenerator::needSpillTemp(TR_LiveReference * cursor, TR::Node *parent, T
10411041
}
10421042

10431043
bool
1044-
OMR::CodeGenerator::allowGlobalRegisterAcrossBranch(TR_RegisterCandidate *, TR::Node * branchNode)
1044+
OMR::CodeGenerator::allowGlobalRegisterAcrossBranch(TR::RegisterCandidate *, TR::Node * branchNode)
10451045
{
10461046
return !(branchNode->getOpCode().isJumpWithMultipleTargets()) || debug("enableSwitch");
10471047
}
@@ -1146,11 +1146,11 @@ OMR::CodeGenerator::TR_RegisterPressureState::updateRegisterPressure(TR::Symbol
11461146

11471147

11481148
TR_GlobalRegisterNumber
1149-
OMR::CodeGenerator::pickRegister(TR_RegisterCandidate *rc,
1149+
OMR::CodeGenerator::pickRegister(TR::RegisterCandidate *rc,
11501150
TR::Block * *allBlocks,
11511151
TR_BitVector & availableRegisters,
11521152
TR_GlobalRegisterNumber & highRegisterNumber,
1153-
TR_LinkHead<TR_RegisterCandidate> *candidatesAlreadyAssigned)
1153+
TR_LinkHead<TR::RegisterCandidate> *candidatesAlreadyAssigned)
11541154
{
11551155
static volatile bool isInitialized=false;
11561156
static volatile uint8_t gprsWithheldFromPickRegister=0, fprsWithheldFromPickRegister=0, vrfWithheldFromPickRegister=0, gprsWithheldFromPickRegisterWhenWarm=0;
@@ -1317,7 +1317,7 @@ OMR::CodeGenerator::pickRegister(TR_RegisterCandidate *rc,
13171317
self()->getNumberOfGlobalFPRs()+meniscus-fprDelta,
13181318
self()->getNumberOfGlobalVRFs()+meniscus-vrfDelta,
13191319
0);
1320-
for (TR_RegisterCandidate *candidate = candidatesAlreadyAssigned->getFirst(); candidate; candidate = candidate->getNext())
1320+
for (TR::RegisterCandidate *candidate = candidatesAlreadyAssigned->getFirst(); candidate; candidate = candidate->getNext())
13211321
{
13221322
if (candidate->getBlocksLiveOnEntry().get(block->getNumber()))
13231323
{
@@ -1497,7 +1497,7 @@ OMR::CodeGenerator::pickRegister(TR_RegisterCandidate *rc,
14971497
{
14981498
TR::Node *node = tt->getNode();
14991499
bool isUnpreferred;
1500-
TR_RegisterCandidate *candidate = self()->findCoalescenceForRegisterCopy(node, rc, &isUnpreferred);
1500+
TR::RegisterCandidate *candidate = self()->findCoalescenceForRegisterCopy(node, rc, &isUnpreferred);
15011501

15021502
if (candidate)
15031503
{
@@ -1579,7 +1579,7 @@ OMR::CodeGenerator::pickRegister(TR_RegisterCandidate *rc,
15791579

15801580
if (!candidate)
15811581
{
1582-
TR_RegisterCandidate *candidate = self()->findUsedCandidate(node, rc, &visitedNodesForCandidateUse);
1582+
TR::RegisterCandidate *candidate = self()->findUsedCandidate(node, rc, &visitedNodesForCandidateUse);
15831583
if (candidate)
15841584
{
15851585
if (self()->traceSimulateTreeEvaluation())
@@ -1966,16 +1966,16 @@ OMR::CodeGenerator::pickRegister(TR_RegisterCandidate *rc,
19661966
return 0; // eliminate warning
19671967
}
19681968

1969-
TR_RegisterCandidate *
1970-
OMR::CodeGenerator::findCoalescenceForRegisterCopy(TR::Node *node, TR_RegisterCandidate *rc, bool *isUnpreferred)
1969+
TR::RegisterCandidate *
1970+
OMR::CodeGenerator::findCoalescenceForRegisterCopy(TR::Node *node, TR::RegisterCandidate *rc, bool *isUnpreferred)
19711971
{
1972-
TR_RegisterCandidate *candidate = NULL;
1972+
TR::RegisterCandidate *candidate = NULL;
19731973
if (node->getOpCode().isStoreDirect() && node->getFirstChild()->getOpCode().isLoadVarDirect())
19741974
{
19751975
if (self()->comp()->getOption(TR_TraceRegisterPressureDetails))
19761976
traceMsg(self()->comp(), " found copy %s\n", self()->getDebug()->getName(node));
19771977

1978-
TR_RegisterCandidate *storedCand = self()->comp()->getGlobalRegisterCandidates()->find(node->getSymbolReference());
1978+
TR::RegisterCandidate *storedCand = self()->comp()->getGlobalRegisterCandidates()->find(node->getSymbolReference());
19791979

19801980
if (storedCand)
19811981
{
@@ -1985,7 +1985,7 @@ OMR::CodeGenerator::findCoalescenceForRegisterCopy(TR::Node *node, TR_RegisterCa
19851985
candidate = storedCand;
19861986
}
19871987

1988-
TR_RegisterCandidate *loadedCand = self()->comp()->getGlobalRegisterCandidates()->find(node->getFirstChild()->getSymbolReference());
1988+
TR::RegisterCandidate *loadedCand = self()->comp()->getGlobalRegisterCandidates()->find(node->getFirstChild()->getSymbolReference());
19891989
if (loadedCand)
19901990
{
19911991
int32_t storedSymRefNum = node->getSymbolReference()->getReferenceNumber();
@@ -1998,7 +1998,7 @@ OMR::CodeGenerator::findCoalescenceForRegisterCopy(TR::Node *node, TR_RegisterCa
19981998
}
19991999

20002000
TR_GlobalRegisterNumber
2001-
OMR::CodeGenerator::findCoalescenceRegisterForParameter(TR::Node *callNode, TR_RegisterCandidate *rc, uint32_t childIndex, bool *isUnpreferred)
2001+
OMR::CodeGenerator::findCoalescenceRegisterForParameter(TR::Node *callNode, TR::RegisterCandidate *rc, uint32_t childIndex, bool *isUnpreferred)
20022002
{
20032003
TR::Node *paramNode = callNode->getChild(childIndex);
20042004
if (paramNode->getOpCode().isLoadVarDirect())
@@ -2010,15 +2010,15 @@ OMR::CodeGenerator::findCoalescenceRegisterForParameter(TR::Node *callNode, TR_R
20102010
}
20112011

20122012

2013-
TR_RegisterCandidate *
2014-
OMR::CodeGenerator::findUsedCandidate(TR::Node *node, TR_RegisterCandidate *rc, TR_BitVector *visitedNodes)
2013+
TR::RegisterCandidate *
2014+
OMR::CodeGenerator::findUsedCandidate(TR::Node *node, TR::RegisterCandidate *rc, TR_BitVector *visitedNodes)
20152015
{
20162016
if (visitedNodes->isSet(node->getGlobalIndex()))
20172017
return NULL;
20182018
else
20192019
visitedNodes->set(node->getGlobalIndex());
20202020

2021-
TR_RegisterCandidate *gprToCoalesce = NULL;
2021+
TR::RegisterCandidate *gprToCoalesce = NULL;
20222022
if (node->getOpCode().isLoadVarDirect() || node->getOpCode().isStoreDirect())
20232023
gprToCoalesce = self()->comp()->getGlobalRegisterCandidates()->find(node->getSymbolReference());
20242024

@@ -2208,12 +2208,12 @@ inline void leaveSpaceForRegisterPressureState(OMR::CodeGenerator::TR_RegisterPr
22082208
standardNodeSimulationAnnotations(state, comp);
22092209
}
22102210

2211-
static TR_RegisterCandidate *findCandidate(TR::SymbolReference *symRef, TR_LinkHead<TR_RegisterCandidate> *candidates, TR_RegisterCandidate *anotherCandidate=NULL)
2211+
static TR::RegisterCandidate *findCandidate(TR::SymbolReference *symRef, TR_LinkHead<TR::RegisterCandidate> *candidates, TR::RegisterCandidate *anotherCandidate=NULL)
22122212
{
22132213
if (anotherCandidate && anotherCandidate->getSymbolReference() == symRef)
22142214
return anotherCandidate;
22152215

2216-
TR_RegisterCandidate *result;
2216+
TR::RegisterCandidate *result;
22172217
for (result = candidates->getFirst(); result && result->getSymbolReference() != symRef; result = result->getNext());
22182218
return result;
22192219
}
@@ -2223,7 +2223,7 @@ static void rememberMostRecentValue(TR::SymbolReference *symRef, TR::Node *value
22232223
if ( state->_alreadyAssignedOnExit.isSet(symRef->getReferenceNumber())
22242224
|| (state->_candidate && (state->getCandidateSymRef() == symRef)))
22252225
{
2226-
TR_RegisterCandidate *candidate = findCandidate(symRef, state->_candidatesAlreadyAssigned, state->_candidate);
2226+
TR::RegisterCandidate *candidate = findCandidate(symRef, state->_candidatesAlreadyAssigned, state->_candidate);
22272227
TR_ASSERT(candidate, "rememberMostRecentValue: there should be a matching candidate for #%d %s", symRef->getReferenceNumber(), cg->getDebug()->getName(symRef));
22282228
if (candidate)
22292229
candidate->setMostRecentValue(valueNode);
@@ -2232,7 +2232,7 @@ static void rememberMostRecentValue(TR::SymbolReference *symRef, TR::Node *value
22322232

22332233
static void
22342234
keepMostRecentValueAliveIfLiveOnEntryToSuccessor(
2235-
TR_RegisterCandidate *candidate,
2235+
TR::RegisterCandidate *candidate,
22362236
TR::TreeTop *exitPoint,
22372237
TR::CFGNode *successor,
22382238
OMR::CodeGenerator::TR_RegisterPressureState *state,
@@ -2255,7 +2255,7 @@ keepMostRecentValueAliveIfLiveOnEntryToSuccessor(
22552255

22562256
static void
22572257
killMostRecentValueIfKeptAliveUntilCurrentTreeTop(
2258-
TR_RegisterCandidate *candidate,
2258+
TR::RegisterCandidate *candidate,
22592259
OMR::CodeGenerator::TR_RegisterPressureState *state,
22602260
TR::CodeGenerator *cg)
22612261
{
@@ -2423,7 +2423,7 @@ OMR::CodeGenerator::simulationPrePass(
24232423
else if (node->getOpCode().isLoadVarDirect())
24242424
{
24252425
rememberMostRecentValue(node->getSymbolReference(), node, state, self());
2426-
TR_RegisterCandidate *rc = findCandidate(node->getSymbolReference(), state->_candidatesAlreadyAssigned, state->_candidate);
2426+
TR::RegisterCandidate *rc = findCandidate(node->getSymbolReference(), state->_candidatesAlreadyAssigned, state->_candidate);
24272427
if (rc)
24282428
rc->setLastLoad(node);
24292429
}
@@ -2434,7 +2434,7 @@ OMR::CodeGenerator::simulationPrePass(
24342434
if (state->_candidate)
24352435
keepMostRecentValueAliveIfLiveOnEntryToSuccessor(state->_candidate, tt, (*e)->getTo(), state, self());
24362436
if (state->_candidatesAlreadyAssigned)
2437-
for (TR_RegisterCandidate *candidate = state->_candidatesAlreadyAssigned->getFirst(); candidate; candidate = candidate->getNext())
2437+
for (TR::RegisterCandidate *candidate = state->_candidatesAlreadyAssigned->getFirst(); candidate; candidate = candidate->getNext())
24382438
keepMostRecentValueAliveIfLiveOnEntryToSuccessor(candidate, tt, (*e)->getTo(), state, self());
24392439
}
24402440
}
@@ -2558,7 +2558,7 @@ OMR::CodeGenerator::simulateTreeEvaluation(TR::Node *node, TR_RegisterPressureSt
25582558
// Kill anything that's being kept alive until here
25592559
//
25602560
killMostRecentValueIfKeptAliveUntilCurrentTreeTop(state->_candidate, state, self());
2561-
for (TR_RegisterCandidate *candidate = state->_candidatesAlreadyAssigned->getFirst(); candidate; candidate = candidate->getNext())
2561+
for (TR::RegisterCandidate *candidate = state->_candidatesAlreadyAssigned->getFirst(); candidate; candidate = candidate->getNext())
25622562
killMostRecentValueIfKeptAliveUntilCurrentTreeTop(candidate, state, self());
25632563
}
25642564

‎compiler/codegen/OMRCodeGenPhase.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -81,7 +81,7 @@
8181
#include <utility>
8282

8383
class TR_BackingStore;
84-
class TR_RegisterCandidate;
84+
namespace TR { class RegisterCandidate; }
8585
class TR_Structure;
8686

8787
/*
@@ -458,7 +458,7 @@ OMR::CodeGenPhase::performSetupForInstructionSelectionPhase(TR::CodeGenerator *
458458
cg->initializeRegisterPressureSimulator();
459459
for (TR::Block *block = comp->getStartBlock(); block; block = block->getNextExtendedBlock())
460460
{
461-
TR_LinkHead<TR_RegisterCandidate> emptyCandidateList;
461+
TR_LinkHead<TR::RegisterCandidate> emptyCandidateList;
462462
TR::CodeGenerator::TR_RegisterPressureState state(NULL, 0, emptyBitVector, emptyBitVector, &emptyCandidateList, cg->getNumberOfGlobalGPRs(), cg->getNumberOfGlobalFPRs(), cg->getNumberOfGlobalVRFs(), vc);
463463
TR::CodeGenerator::TR_RegisterPressureSummary summary(state._gprPressure, state._fprPressure, state._vrfPressure);
464464
cg->simulateBlockEvaluation(block, &state, &summary);

‎compiler/codegen/OMRCodeGenerator.hpp

+8-8
Original file line numberDiff line numberDiff line change
@@ -81,8 +81,8 @@ class TR_LiveReference;
8181
class TR_LiveRegisters;
8282
class TR_OSRMethodData;
8383
class TR_PseudoRegister;
84-
class TR_RegisterCandidate;
85-
class TR_RegisterCandidates;
84+
namespace TR { class RegisterCandidate; }
85+
namespace TR { class RegisterCandidates; }
8686
namespace TR { class Relocation; }
8787
namespace TR { class RelocationDebugInfo; }
8888
class TR_ResolvedMethod;
@@ -1025,13 +1025,13 @@ class OMR_EXTENSIBLE CodeGenerator
10251025
TR_BitVector *getGlobalFPRsPreservedAcrossCalls(){ return NULL; }
10261026

10271027
int32_t getFirstBit(TR_BitVector &bv);
1028-
TR_GlobalRegisterNumber pickRegister(TR_RegisterCandidate *, TR::Block * *, TR_BitVector & availableRegisters, TR_GlobalRegisterNumber & highRegisterNumber, TR_LinkHead<TR_RegisterCandidate> *candidates);
1029-
TR_RegisterCandidate *findCoalescenceForRegisterCopy(TR::Node *node, TR_RegisterCandidate *rc, bool *isUnpreferred);
1030-
TR_GlobalRegisterNumber findCoalescenceRegisterForParameter(TR::Node *callNode, TR_RegisterCandidate *rc, uint32_t childIndex, bool *isUnpreferred);
1031-
TR_RegisterCandidate *findUsedCandidate(TR::Node *node, TR_RegisterCandidate *rc, TR_BitVector *visitedNodes);
1028+
TR_GlobalRegisterNumber pickRegister(TR::RegisterCandidate *, TR::Block * *, TR_BitVector & availableRegisters, TR_GlobalRegisterNumber & highRegisterNumber, TR_LinkHead<TR::RegisterCandidate> *candidates);
1029+
TR::RegisterCandidate *findCoalescenceForRegisterCopy(TR::Node *node, TR::RegisterCandidate *rc, bool *isUnpreferred);
1030+
TR_GlobalRegisterNumber findCoalescenceRegisterForParameter(TR::Node *callNode, TR::RegisterCandidate *rc, uint32_t childIndex, bool *isUnpreferred);
1031+
TR::RegisterCandidate *findUsedCandidate(TR::Node *node, TR::RegisterCandidate *rc, TR_BitVector *visitedNodes);
10321032

1033-
bool allowGlobalRegisterAcrossBranch(TR_RegisterCandidate *, TR::Node * branchNode);
1034-
void removeUnavailableRegisters(TR_RegisterCandidate * rc, TR::Block * * blocks, TR_BitVector & availableRegisters) {}
1033+
bool allowGlobalRegisterAcrossBranch(TR::RegisterCandidate *, TR::Node * branchNode);
1034+
void removeUnavailableRegisters(TR::RegisterCandidate * rc, TR::Block * * blocks, TR_BitVector & availableRegisters) {}
10351035
void setUnavailableRegistersUsage(TR_Array<TR_BitVector> & liveOnEntryUsage, TR_Array<TR_BitVector> & liveOnExitUsage) {}
10361036

10371037
int32_t getMaximumNumberOfGPRsAllowedAcrossEdge(TR::Node *) { return INT_MAX; }

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