From a3993c98463b93deebaa3ed22a264749e806b67f Mon Sep 17 00:00:00 2001
From: Jonas Spanoghe <jonas@spanoghe.net>
Date: Mon, 20 Feb 2023 10:11:41 +0100
Subject: [PATCH] Run `cargo clippy --fix`

---
 build.rs        | 6 +++---
 src/clock.rs    | 4 ++--
 src/i2c.rs      | 2 +-
 src/watchdog.rs | 6 +++---
 4 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/build.rs b/build.rs
index cc43fb0..b27e8ce 100644
--- a/build.rs
+++ b/build.rs
@@ -18,12 +18,12 @@ fn main() {
         let target = target.to_string();
 
         fs::copy(
-            format!("bin/trap_{}.a", target),
-            out_dir.join(format!("lib{}.a", name)),
+            format!("bin/trap_{target}.a"),
+            out_dir.join(format!("lib{name}.a")),
         )
         .unwrap();
 
-        println!("cargo:rustc-link-lib=static={}", name);
+        println!("cargo:rustc-link-lib=static={name}");
         println!("cargo:rustc-link-search={}", out_dir.display());
 
         // Put the linker script somewhere the linker can find it
diff --git a/src/clock.rs b/src/clock.rs
index 5735590..884e41d 100644
--- a/src/clock.rs
+++ b/src/clock.rs
@@ -207,7 +207,7 @@ impl Strict {
         let uart_clk = self
             .target_uart_clk
             .map(|f| f.get())
-            .unwrap_or(uart_clk_src as u32);
+            .unwrap_or(uart_clk_src);
 
         let uart_clk_div = {
             let ans = uart_clk_src / uart_clk;
@@ -599,7 +599,7 @@ fn aon_power_on_xtal() -> Result<(), &'static str> {
 fn hbn_set_root_clk_sel_pll() {
     unsafe { &*pac::HBN::ptr() }.hbn_glb.modify(|r, w| unsafe {
         w.hbn_root_clk_sel()
-            .bits(r.hbn_root_clk_sel().bits() as u8 | 0b10u8)
+            .bits(r.hbn_root_clk_sel().bits() | 0b10u8)
     });
 }
 
diff --git a/src/i2c.rs b/src/i2c.rs
index 673923f..918febf 100644
--- a/src/i2c.rs
+++ b/src/i2c.rs
@@ -305,7 +305,7 @@ where
             }
             self.i2c
                 .i2c_fifo_wdata
-                .write(|w| unsafe { w.i2c_fifo_wdata().bits(*value as u32) });
+                .write(|w| unsafe { w.i2c_fifo_wdata().bits(*value) });
         }
 
         while self.i2c.i2c_bus_busy.read().sts_i2c_bus_busy().bit_is_set() {
diff --git a/src/watchdog.rs b/src/watchdog.rs
index 8d85d90..ff4f8b2 100644
--- a/src/watchdog.rs
+++ b/src/watchdog.rs
@@ -184,7 +184,7 @@ impl ConfiguredWatchdog0 {
     /// Gets the value in ticks the match register is currently set to
     pub fn get_match_ticks(&self) -> u16 {
         let timer = unsafe { &*pac::TIMER::ptr() };
-        timer.wmr.read().wmr().bits() as u16
+        timer.wmr.read().wmr().bits()
     }
 
     /// Get the current value of the watchdog timer in nanoseconds
@@ -197,7 +197,7 @@ impl ConfiguredWatchdog0 {
     /// Get the current value in ticks of the watchdog timer
     pub fn get_current_ticks(&self) -> u16 {
         let timer = unsafe { &*pac::TIMER::ptr() };
-        timer.wvr.read().wvr().bits() as u16
+        timer.wvr.read().wvr().bits()
     }
 
     /// Get the current value of the watchdog timer in nanoseconds
@@ -210,7 +210,7 @@ impl ConfiguredWatchdog0 {
     /// Read the TCCR register containing the CS_WDT bits that select the clock source
     pub fn get_cs_wdt(&self) -> u8 {
         let timer = unsafe { &*pac::TIMER::ptr() };
-        timer.tccr.read().cs_wdt().bits() as u8
+        timer.tccr.read().cs_wdt().bits()
     }
 
     /// Read the WMER register's WRIE bit to see if the WDT is in Reset or Interrupt mode.