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Commit b738a4f

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author
Frans Kaashoek
committed
kill TLB shoot down code
1 parent de40730 commit b738a4f

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5 files changed

+0
-49
lines changed

5 files changed

+0
-49
lines changed

defs.h

-1
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,6 @@ int cpunum(void);
7373
extern volatile uint* lapic;
7474
void lapiceoi(void);
7575
void lapicinit(int);
76-
void lapic_tlbflush(uint);
7776
void lapicstartap(uchar, uint);
7877
void microdelay(int);
7978

lapic.c

-38
Original file line numberDiff line numberDiff line change
@@ -47,27 +47,6 @@ lapicw(int index, int value)
4747
lapic[ID]; // wait for write to finish, by reading
4848
}
4949

50-
static uint
51-
lapicr(uint off)
52-
{
53-
return lapic[off];
54-
}
55-
56-
static int
57-
apic_icr_wait()
58-
{
59-
uint i = 100000;
60-
while ((lapicr(ICRLO) & BUSY) != 0) {
61-
nop_pause();
62-
i--;
63-
if (i == 0) {
64-
cprintf("apic_icr_wait: wedged?\n");
65-
return -1;
66-
}
67-
}
68-
return 0;
69-
}
70-
7150
//PAGEBREAK!
7251
void
7352
lapicinit(int c)
@@ -151,23 +130,6 @@ microdelay(int us)
151130
{
152131
}
153132

154-
155-
// Send IPI
156-
void
157-
lapic_ipi(int cpu, int ino)
158-
{
159-
lapicw(ICRHI, cpu << 24);
160-
lapicw(ICRLO, FIXED | DEASSERT | ino);
161-
if (apic_icr_wait() < 0)
162-
panic("lapic_ipi: icr_wait failure");
163-
}
164-
165-
void
166-
lapic_tlbflush(uint cpu)
167-
{
168-
lapic_ipi(cpu, T_TLBFLUSH);
169-
}
170-
171133
#define IO_RTC 0x70
172134

173135
// Start additional processor running bootstrap code at addr.

trap.c

-4
Original file line numberDiff line numberDiff line change
@@ -73,10 +73,6 @@ trap(struct trapframe *tf)
7373
cpu->id, tf->cs, tf->eip);
7474
lapiceoi();
7575
break;
76-
case T_TLBFLUSH:
77-
lapiceoi();
78-
lcr3(rcr3());
79-
break;
8076

8177
//PAGEBREAK: 13
8278
default:

traps.h

-1
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,6 @@
2525
// These are arbitrarily chosen, but with care not to overlap
2626
// processor defined exceptions or interrupt vectors.
2727
#define T_SYSCALL 64 // system call
28-
#define T_TLBFLUSH 65 // flush TLB
2928
#define T_DEFAULT 500 // catchall
3029

3130
#define T_IRQ0 32 // IRQ 0 corresponds to int T_IRQ

vm.c

-5
Original file line numberDiff line numberDiff line change
@@ -137,11 +137,6 @@ loadvm(struct proc *p)
137137

138138
lcr3(PADDR(p->pgdir)); // switch to new address space
139139
popcli();
140-
141-
// Conservatively flush other processor's TLBs
142-
// XXX lazy--just 2 cpus, but xv6 doesn't need shootdown anyway.
143-
if (cpu->id == 0) lapic_tlbflush(1);
144-
else lapic_tlbflush(0);
145140
}
146141

147142
// Setup kernel part of a page table. Linear adresses map one-to-one

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