PWM脉冲宽度调制

Module PWM(
  input RESET,
  input [2:0] address,
  input [15:0] Data,
  input CS,
  input CLK,
  input IOW,
  output PWM
);

reg [15:0] Max;
reg [15:0] Comp;
reg [15:0] Ena;

always@(posedge CLK)begin
    if(CS)begin
      if(RESET)begin
        PWM=0;
        Max=0;
        Comp=0;
        Ena=0;
      end
      else if(IOW==1)begin
        if(address==3'b000)begin
          Max=Data;
        end
        else if(address==3'b010)begin
          Comp=Data;
        end
        else if(address==3'b100)begin
          Ena=Data;
        end
      end
      
      if(Comp==Max)begin
        PWM=1;
      end
      else if(Comp<=Max)begin
        Comp=Comp+1;
        PWM=0;
      end
      
      
    end
  end
endmodule