Skip to content
/ CPU Public

Explore the 🖥️ CPU diagram 📊 and assembler 🛠️ written in Python, designed to provide a comprehensive understanding of CPU architecture and assembly language programming. This project offers visual insights into CPU components and their interactions, complemented by an assembler capable of translating assembly code into machine code instructions.

License

Notifications You must be signed in to change notification settings

Daynlight/CPU

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 
 
 
 
 
 
 

Repository files navigation

✨CPU ASEMBLER AND DIAGRAM IN LOGISIM✨

This is my cpu diagram and assembler created for learning purposes.

🎈Base Information about CPU Diagram🎈

RISC Architecture
32 bit Data Line
3 bit Operation Step
4 Registers (0-4)
2 DISCKS and 1 BIOS

💎Usage💎

I. Download Repository From Release Branch.
II. Download Java Java
III. Go to APP Folder
IV. Run logisim-win-2.7.1.exe
V. Open File and load CPU.circ
VI. Load Images from OS Folder to Bios and Disk
VII. Have Fun <3

📃Asembler Operations codes📃

Code What do Structure !
mmu Set MMU locations on disk to jump there for example when you use loop. mmu (Place on Disk in Hex) Register 1 = MMU ID
Register 2 = Disk Location
!Location need by increment by one!
gto Fill Spaces betwaen MMU aplications gto "Place on Disck in Hex"
jmp Jump to MMU location. jmp Register 3 = Disk
Register 1 = MMU ID
!Compare need be set on true condition!
var Set Data on Register. var (Register) "Data"
pri Print text in terminal. pri "Text"
nel Go to next line. nel
prr Copy Data from one Register and paste data in another. prr (Register) (Register)
out Display Data from Register. out (Register)
get Get Data From Input and save in register. get (Register)
sme Save data from Register in RAM. sme (Register) RAM Location = Register 4
gme Get Data From RAM and save in Register. gme (Register) RAM Location = Register 4
com Compare two datas. com A = Register 1
B = Register 2
OP = Register 3
Avaible Operations:
0 -> >
1 -> =
2 -> <
3 -> <=
4 -> !=
5 -> >=
6 -> True
7 -> False
alu Make ALU operations. alu OP = Register 0
A = Register 1
B = Register 2
Result = Register 3
wai Wait for input. wai
dsc Go to Disk from Register. dsc (Register) You need set Jump before you go to Disck
sav Save data on disck. sav Disck = Register 3
Data = Register 2
Location = Register 1
end End Program end

💻ALU Operations💻

0. A
1. not A
2. AND
3. OR
4. XOR
5. NAND
6. NOR
7. ff
8. 00
9. ADD
10. Sub
11. Mult
12. Devider
13. Random
14.
15.

🗻OP Table🗻

DESCRIPTION OP R R More Info
NULL 0 Do nothing
R -> M 1 R Save in RAM
R4=location
M -> R 2 R Get from RAM
R4=location
JMP 3 R R3=Disck to jmp
R1 mmu loation
Need compart 1
ALU 4 OP = Register 0
A = Register 1
B = Register 2
Result = Register 3
GET 5 R get data to register
OUT 6 R out data from register and display on tty
R -> R 7 R(from) R(to) copy from register to register
R -> Rom 8 Save data on disck
R3=Disck
R2=Data
R1=location
NULL 9
WAIT A Wait for input
COMPARE B Compart
A = Register 1
B = Register 2
OP = Register 3
Operations:
0 - >
1 -> =
2 -> <
3 -> <=
4 -> !=
5 -> >=
6 -> True
7 -> False
MMU C R1=location
R2=content
Need by set before jmp
location +1
Change Disk D R go to dick from register
need set location to jmp before
D - > R E R D Set register
STOP F end program

🛠️Tools🛠️

About

Explore the 🖥️ CPU diagram 📊 and assembler 🛠️ written in Python, designed to provide a comprehensive understanding of CPU architecture and assembly language programming. This project offers visual insights into CPU components and their interactions, complemented by an assembler capable of translating assembly code into machine code instructions.

Topics

Resources

License

Code of conduct

Security policy

Stars

Watchers

Forks