Unsorted files.

These files are all extracted from "Tymeshare tape 169283".  The tape
has 444 savesets, written over a period from 1976-06-30 to 1976-09-22.
In the cases were a file is present on several savesets, the file name
has been suffixed with the saveset number.  Only files with unique
contents (per SHA-1) have been retained.

README.md

@@ -1 +1,3 @@
-To appear here soon.
+MIMIC is a suite of emulators running on a PDP-10, written at Applied
+Data by Bob Supnik, Len Fehskens, and Mike McCarthy.  Targets include
+PDP-8, PDP-11, PDP-15, Nova, and GRI-909.

unsorted/hold/c15ddm

@@ -0,0 +1,130 @@
+;
+	TITLE CPUDDM		MIMIC-15	CENTRAL PROCESSOR DESCRIPTOR		
+;
+	ENTRY CPUDDM
+	EXTERN .READ,.WRITE,.LOADR,.TRDN,.BLDUP,.FETCH,ADDRNT
+	EXTERN BRSET,SLPCHK,CPURD,CPUWR,CPURST,NULL,.FLAGS
+	INTERN ITIM,EAEACS,SMQ,SLAC,LDRUCB,SYSLST,SR,BRKARY
+	INTERN CPUUCB,SC,OLDPC,STM,SIO,C,RELOCC
+	INTERN LR,XR,TRAPS,SPC,LDRBUF,LDRDAT,LDRADR,LDRFLG
+;
+CPUDDM:	DDM1 CPU,CPURDB,CPUUCB
+	DDM2 10,^D15,10,^D18
+	DDM3 QADR+QFIX+QBRK,^D18,MEMSIZ
+	DDM4 CPURD,CPUWR,CPURST,ADDRNT,BRSET,SLPCHK
+;
+CPUUCB:	UCB CPU,0,CPUDDM,NULL,0,QADR+QFIX+QBRK
+;
+EAEACS:	Z	;EAE AC SIGN
+OLDPC:	Z	;OLD PC
+SC:	Z	;SHIFT COUNTER
+SR:	Z	;SWITCH REGISTER
+LR:	Z	;LIMIT REGISTER.
+XR:	Z	;INDEX REGISTER.
+;
+ITIM:	Z	;INTERVAL TIMER.
+	Z	;LAST UPDATE OF ITIM.
+TRAPS:	200000000000	;SET ILLMEM ON.
+STM:	Z	;SAVED LIVE REGISTERS:  TIME
+SIO:	Z	;I-O FLAGS  BM, UM, DBR, ETC.
+SIR:	Z	;INSTRUCTION REGISTER
+SPC:	Z	;PROGRAM COUNTER
+SLAC:	Z	;LINK AC
+SMQ:	Z	;MQ
+SMA:	Z	;MEMORY ADDRESS
+SMB:	Z	;MEMORY BUFFER
+	BLOCK 3	;INDEX REGISTERS
+;
+	SUBTTL	MIMIC-15	DDM HEADER AND UCB
+	SUBTTL	MIMIC-15	REGISTER DESCRIPTION BLOCKS
+;
+CPURDB:	RDB AC,SLAC,18	;REGISTERS:  AC
+;
+	RDB XR,XR,18
+;
+	RDB LR,LR,18
+;
+	FLG BNK,SIO,0
+;
+	RDB SR,SR,18	;SWITCHES
+;
+CPUPC:	RDB PC,SPC,18	;PC
+;
+	RDB STAT,SIO,19	;I/O STATUS.
+;
+	DRDB CORE,CPUDDM+DNFRM,18,P
+;
+	RDB OLDPC,OLDPC,18,P	;OLD PC
+;
+	RDB MQ,SMQ,18	;MQ
+;
+	FLG L,SLAC,^D17	;LINK
+;
+	FLG LINK,SLAC,^D17
+;
+	RDB SC,SC,6
+;
+	DRDB TM,STM,36,P
+	DRDB ITM,ITIM,36	;INTERVAL TIMER
+;
+	RDB IR,IR,4,P
+;
+	RDB MA,SMA,15,P
+;
+	RDB MB,SMB,18,P
+;
+	RDB ASR,RELOCC,15
+;
+	FLG LDRFLG,LDRFLG,0
+;
+	RDB LDRADR,LDRADR,18
+;
+	RDB LDRDAT,LDRDAT,18
+;
+	FLG SINGLE,.FLAGS,1
+;
+	FLG SI,.FLAGS,1
+;
+	FLG ILLEG,TRAPS,0
+;
+	FLG ILLMEM,TRAPS,1
+;
+	FLG ION,SIO,^D18	;INTERRUPTS ENABLED.
+;
+	FLG TRAP,SIO,1	;TRAPS ENABLED
+;
+	FLG EXT,SIO,0	;EXTENDED MEMORY ENABLED.
+;
+	Z
+;
+	SUBTTL	MIMIC-15	CORE STORAGE
+;
+;
+	IFNDEF CPU,<CPU=^D12>
+	MEMSIZ=CPU*^D1024
+C:	XLIST	;UNLIST CORE ARRAY
+	REPEAT <MEMSIZ/2>,<0>
+BRKARY:	REPEAT <MEMSIZ/^D32>,<0>
+	LIST
+;
+	SUBTTL	MIMIC-15	SYSLST BLOCK
+;
+SYSLST:	SIXBIT /PDP15/
+	Z,.FETCH
+	Z,CPUPC
+	XWD .LOADR,LDRUCB
+	Z,.BLDUP
+	Z,.TRDN
+	DDM3 QADR+QRD+QATBL,^D36,0
+	Z,STM
+;
+LDRUCB:	UCB LDR,0,SYSLST,NULL,LDRFAB,QADR+QRD+QATBL
+;
+RELOCC:	Z
+LDRADR:	Z
+LDRDAT:	Z
+LDRFLG:	Z
+;
+LDRFAB:	FAB LDR,0	;FILE ACCESS BLOCK FOR LOADR
+	END
+

unsorted/hold/c8eddm

@@ -0,0 +1,137 @@
+;
+	TITLE CPUDDM		MIMIC 8/E	CPU DESCRIPTOR		
+
+
+
+IFNDEF EAE,<	EAE=0>
+	IFNDEF CPU,<	CPU=4>
+	MEMSIZ=CPU*^D1024
+
+	IFNDEF PWR,<	PWR=0>
+
+;
+	EXTERN CPURD, CPUWR, CPURST, NULL, SLPCHK, ADDRNT
+	EXTERN .FLAGS,.BRSET,.READ,.WRITE
+	EXTERN .LOADR,.BLDUP,.TRDN,.FETCH
+	INTERN ITIM,EAEMOD, SPC,LDRUCB,SYSLST,DISABL
+	INTERN DBR,IBR,IBBR,SR,BSR,OLDPC,PCSAVE,SC
+	INTERN STM,CPUUCB,CPUDDM,SIO,SLAC,CORE
+	INTERN BANK0, BNKTBL, TRAPS, GTFF
+;
+;DDM HEADER....
+;
+CPUDDM:	DDM1 CPU,CPURDB,CPUUCB	;DEVICE HEADER.
+	DDM2 ^D8,^D15,^D8,^D12	;ADDRESSES AND FRAMES
+	DDM3 QADR+QFIX+QBRK,^D12,MEMSIZ
+	DDM4 CPURD,CPUWR,CPURST,ADDRNT,.BRSET,SLPCHK
+
+	CORE=CPUDDM+DNFRM
+;
+CPUUCB:	UCB CPU,0,CPUDDM,NULL,0,QADR+QFIX+QBRK
+;
+BNKTBL:	BANK0(MA)
+	BANK1(MA)
+	BANK2(MA)
+	BANK3(MA)
+	BANK4(MA)
+	BANK5(MA)
+	BANK6(MA)
+	BANK7(MA)
+
+;
+ITIM:	Z	;INTERVAL TIMER
+	Z	;TIME OF LAST UPDATE
+XXCORE:	MEMSIZ
+STM:	Z	;SAVE TIMER
+SIO:	Z	;SAVED FLAGS
+SIR:	Z	;IR AND OTHER SAVED REGISTERS
+SPC:	Z	;PC
+SLAC:	Z	;L-AC
+SMQ:	Z	;MQ
+SMA:	Z	;MA
+SMB:	Z	;MB
+	Z	;SAVED XRS
+	Z
+	Z
+;
+IBR:	Z	;IBR AND OTHER REAL REGISTERS
+DBR:	Z
+IBBR:	Z
+BSR:	Z
+SR:	Z
+OLDPC:	Z
+SC:	Z
+PCSAVE:	Z
+TRAPS:	Z
+DISABL:	Z
+GTFF:	Z
+EAEMOD:	Z
+;
+	SUBTTL	MIMIC 8/E	REGISTER DESCRIPTION BLOCKS
+;
+CPURDB:	RDB AC,SLAC,12	;AC,SAVED.
+	RDB MQ,SMQ,12	;MQ, SAVED.
+	RDB MA,SMA,12,P
+	RDB MB,SMB,12,P
+	RDB IR,SIR,3,P
+CPUPC:	RDB PC,SPC,15
+	RDB SR,SR,12
+	RDB IBBR,IBBR,3
+	RDB DBR,DBR,3
+	RDB OLDPC,OLDPC,15,P
+	RDB BSR,BSR,6
+	DRDB TM,STM,36,P
+	DRDB ITM,ITIM,36	;INTERVAL TIMER
+	RDB STAT,SIO,12
+IFN EAE,<	RDB SC,SC,5	;EAE SHIFT COUNTER
+	FLG EAEMDE,EAEMOD,35	;EAE MODE FLOP
+>
+	DRDB CORE,XXCORE,15,P
+;
+	FLG L,SLAC,^D23
+	FLG LINK,SLAC,^D23
+	FLG ION,SIO,1
+IFN PWR,<	FLG PWR,SIO,27>
+	FLG SINGLE,.FLAGS,1
+	FLG SI,.FLAGS,1	;SIN INST TRAP, REG AND ABBREVIATION
+	FLG ILLEG,TRAPS,0
+;
+	RBLK IBR,SPC,3,,8,23
+	Z
+
+
+BANK0:
+	XLIST		;MEMORY SO DON'T LIST!!
+	REPEAT MEMSIZ, <Z>
+	LIST
+
+BANK1=BANK0
+	IFG MEMSIZ-^D4096,<	BANK1=BANK0+^D4096>
+BANK2=BANK0
+	IFG MEMSIZ-^D8192,<	BANK2=BANK0+^D8192>
+BANK3=BANK1
+	IFG MEMSIZ-^D12288,<	BANK3=BANK0+^D12288>
+BANK4=BANK0
+	IFG MEMSIZ-^D16384,<	BANK4=BANK0+^D16384>
+BANK5=BANK1
+	IFG MEMSIZ-^D20480,<	BANK5=BANK0+^D20480>
+BANK6=BANK2
+	IFG MEMSIZ-^D24576,<	BANK6=BANK0+^D24576>
+BANK7=BANK3
+	IFG MEMSIZ-^D28672,<	BANK7=BANK0+^D28672>
+
+;
+SYSLST:	SIXBIT /PDP8/	;SYSTEM LIST:  SYSTEM NAME
+	Z ,.FETCH	;ENTRY TO FETCH PHASE
+	Z ,CPUPC	;PC RDB
+	XWD .LOADR,LDRUCB	;SYSTEM LOADER INFORMATION.
+	Z ,.BLDUP	;BUILD UP VM AC'S
+	Z ,.TRDN	;TEAR DOWN VM AC'S.
+	DDM3 QADR+QATBL+QRD,^D36,0
+	Z,STM
+;
+LDRUCB:	UCB LDR,0,SYSLST,NULL,LDRFAB,QADR+QATBL+QRD
+;
+LDRFAB:	FAB LDR,0
+;
+	END