This is a Forth-inspired processor targeting the Lattice ICE40 FPGA series, primarily targeting the Icoboard.
The CFM core is designed for high performance (40+ MHz) on the ICE40 HX grade parts. It is written in Haskell and synthesized using Clash. Because the Haskell expression of the circuit is directly executable, we also have a cycle-accurate emulator "for free."
The distribution includes BsForth, a non-ANS Forth implementation that can provide a bare-bones interactive development environment with optimizing compiler in less than 5 kiB. It's interesting in the way that it bootstraps (using the cycle-accurate emulator) and for its machine instruction fusion algorithm.
More reading:
- Docs on the instruction set and programmer's model
- The interrupt model
- The Icoboard demo
- The Icestick demo
- Self-hosting: how to recompile BsForth from within BsForth, without using a separate computer.