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1. ApproximateMultiplier_MPW3 ApproximateMultiplier_MPW3 Public

   Verilog 2

2. vsdip/avsddac_3v3_sky130_v1 vsdip/avsddac_3v3_sky130_v1 Public

   Verilog 12 5

3. VSD--Advanced-Physical-Design---OpenLane-SKY130 VSD--Advanced-Physical-Design---OpenLane-SKY130 Public

   The step by step workflow for automation of RTL to GDSII using Sky-water PDK and open-source tool OpenLane.

   3

4. ASAP7_for_KLayout ASAP7_for_KLayout Public

   Forked from laurentc2/ASAP7_for_KLayout

   KLayout technology files for ASAP7 FinFET educational process

5. AXPOS AXPOS Public

   Verilog

6. AXSOP AXSOP Public

   Energy Efficient Sum -of - Products Circuit

   Verilog