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Update BRK timings #153

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Oct 29, 2019
Merged

Update BRK timings #153

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14 changes: 9 additions & 5 deletions core/src/mos6502.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -96,14 +96,18 @@ Pipeline Mos6502::parse_next_instruction() {

switch (current_opcode_->instruction) {
case Instruction::BrkImplied:
result.push([=]() { ++registers_->pc; });
result.push([=]() {
/* Do nothing. */
// Dummy read
mmu_->read_byte(registers_->pc++);
});
result.push([=]() { stack_.push_word(registers_->pc); });
result.push([=]() { stack_.push_byte(registers_->pc >> 8); });
result.push([=]() { stack_.push_byte(registers_->pc & 0xFF); });
result.push([=]() { stack_.push_byte(registers_->p | B_FLAG); });
result.push([=]() { ++registers_->pc; });
result.push([=]() { registers_->pc = mmu_->read_word(kBrkAddress); });
result.push([=]() { tmp_ = mmu_->read_byte(kBrkAddress); });
result.push([=]() {
const uint16_t pch = mmu_->read_byte(kBrkAddress + 1) << 8;
registers_->pc = pch | tmp_;
});
break;
case Instruction::PhpImplied:
result.push([=]() {
Expand Down
22 changes: 12 additions & 10 deletions core/test/src/test_cpu.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -127,7 +127,9 @@ class CpuTest : public ::testing::Test {
: registers(),
mmu(),
cpu{CpuFactory::create_mos6502(&registers, &mmu)},
expected() {}
expected() {
registers.sp = expected.sp = 0xFF;
}

void stage_instruction(uint8_t instruction) {
expected.pc += 1;
Expand Down Expand Up @@ -658,23 +660,23 @@ TEST_F(CpuTest, unsupported_instruction) {
}

TEST_F(CpuTest, brk) {
registers.pc = 0x1234;
stage_instruction(BRK);
expected.pc = 0xDEAD;

const uint8_t expected_pc_stack_addr = expected.sp - 1;
const uint8_t expected_p_stack_addr = expected_pc_stack_addr - 1;

expected.sp -= 2 + 1; // 1 word and 1 byte

ON_CALL(mmu, read_word(kBrkAddress)).WillByDefault(Return(0xDEAD));
// Dummy read
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EXPECT_CALL(mmu, read_byte(0x1235));

EXPECT_CALL(mmu, read_byte(kBrkAddress)).WillOnce(Return(0xAD));
EXPECT_CALL(mmu, read_byte(kBrkAddress + 1)).WillOnce(Return(0xDE));

// First the return address is pushed and then the registers.
EXPECT_CALL(mmu, write_byte(kStackOffset + registers.sp, 0x12));
EXPECT_CALL(mmu, write_byte(kStackOffset + registers.sp - 1, 0x36));
EXPECT_CALL(mmu,
write_word(
kStackOffset + expected_pc_stack_addr, registers.pc + 2));
EXPECT_CALL(mmu,
write_byte(kStackOffset + expected_p_stack_addr,
registers.p | B_FLAG));
write_byte(kStackOffset + registers.sp - 2, registers.p | B_FLAG));

step_execution(7);

Expand Down
27 changes: 11 additions & 16 deletions core/test/src/test_cpuintegration.cpp
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Expand Up @@ -91,7 +91,8 @@ TEST_F(CpuIntegrationTest, simple_program) {
0x8c,
0x02,
0x04,
0x00});
0x00,
0x00}); // Needed for previous BRK dummy read
set_reset_address(0x0600);
set_break_address(0xDEAD);

Expand Down Expand Up @@ -134,7 +135,8 @@ TEST_F(CpuIntegrationTest, branch) {
0x8e,
0x01,
0x02,
0x00});
0x00,
0x00}); // Needed for previous BRK dummy read

set_reset_address(0x0600);
set_break_address(0xDEAD);
Expand Down Expand Up @@ -189,25 +191,18 @@ TEST_F(CpuIntegrationTest, stack) {
0xd0,
0xf5,
0x68});
load_hex_dump(0x0600,
{0xa2,
0x00,
0xa0,
0x00,
0x8a,
0x99,
load_hex_dump(0x0610,
{0x99,
0x00,
0x02,
0x48,
0xe8,
0xc8,
0xc0,
0x10,
0x20,
0xd0,
0xf5,
0x68});
load_hex_dump(
0x0610, {0x99, 0x00, 0x02, 0xc8, 0xc0, 0x20, 0xd0, 0xf7, 0x00});
0xf7,
0x00,
0x00,
0x00}); // Needed for previous BRK dummy read

// STA with absolute indexed addressing will first read from the effective
// address before writing to it, so we need to initialize the fake mmu with
Expand Down