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This is an implementation of a CPU-FPGA heterogeneous computing 3-SAT solver for the Intel HARP Research program. It uses the extreme paralelism of FPGAs to fastly bruteforce a small 3-SAT formula.

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This is an implementation of a CPU-FPGA heterogeneous computing 3-SAT solver for the Intel HARP Research program. It uses the extreme paralelism of FPGAs to fastly bruteforce a small 3-SAT formula. It uses Intel/Altera OpenCL to FPGA synthesis capabilities.

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This is an implementation of a CPU-FPGA heterogeneous computing 3-SAT solver for the Intel HARP Research program. It uses the extreme paralelism of FPGAs to fastly bruteforce a small 3-SAT formula.

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