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RISC-V: implement a2?, idiv and ldiv evaluators #56

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Sep 3, 2024
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56 changes: 56 additions & 0 deletions src/Tinyrossa-RISCV/TRRV64GCodeEvaluator.class.st
Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,37 @@ TRRV64GCodeEvaluator >> commonBin: node opcodeR: opR opcodeI: opI [
^ dstReg
]

{ #category : #'evaluation-helpers' }
TRRV64GCodeEvaluator >> commonDiv: node [
"Handles imul and lmul"

| child1 child2 src1Reg src2Reg dstReg |

child1 := node child1.
child2 := node child2.

src1Reg := self evaluate: child1.

(child2 opcode isLoadConst and: [child2 constant == 1]) ifTrue:[
dstReg := src1Reg.
] ifFalse:[
(child2 opcode isLoadConst and: [child2 constant == -1]) ifTrue:[
dstReg := self codegen allocateRegister.
generate sub: dstReg, zero, src1Reg
] ifFalse:[
src2Reg := self evaluate: child2.
dstReg := self codegen allocateRegister.

node type == Int64 ifTrue:[
generate div: dstReg, src1Reg , src2Reg
] ifFalse:[
generate divw: dstReg, src1Reg , src2Reg
].
]].

^dstReg
]

{ #category : #'evaluation-helpers' }
TRRV64GCodeEvaluator >> commonLoad: node [
"Handles aload, lload, iload, sload & bload"
Expand Down Expand Up @@ -298,11 +329,26 @@ TRRV64GCodeEvaluator >> evaluate_Xloadi: node [
^dstReg.
]

{ #category : #evaluation }
TRRV64GCodeEvaluator >> evaluate_a2b: node [
^ self evaluate: node child1
]

{ #category : #evaluation }
TRRV64GCodeEvaluator >> evaluate_a2i: node [
^ self evaluate: node child1
]

{ #category : #evaluation }
TRRV64GCodeEvaluator >> evaluate_a2l: node [
^ self evaluate: node child1
]

{ #category : #evaluation }
TRRV64GCodeEvaluator >> evaluate_a2s: node [
^ self evaluate: node child1
]

{ #category : #evaluation }
TRRV64GCodeEvaluator >> evaluate_acmpgt: node [
^ self evaluate_Xcmpgt: node
Expand Down Expand Up @@ -414,6 +460,11 @@ TRRV64GCodeEvaluator >> evaluate_iconst: node [
^ dstReg
]

{ #category : #evaluation }
TRRV64GCodeEvaluator >> evaluate_idiv: node [
^self commonDiv: node.
]

{ #category : #'evaluation-helpers' }
TRRV64GCodeEvaluator >> evaluate_ifXcmpeq: node [
"Handles Address, Int64 Int32, Int16 & Int8"
Expand Down Expand Up @@ -660,6 +711,11 @@ TRRV64GCodeEvaluator >> evaluate_lconst: node [
^ dstReg
]

{ #category : #evaluation }
TRRV64GCodeEvaluator >> evaluate_ldiv: node [
^self commonDiv: node.
]

{ #category : #evaluation }
TRRV64GCodeEvaluator >> evaluate_lload: node [
^ self commonLoad: node
Expand Down
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