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This pull request adds support for the TUL PYNQ-Z2 board. BTN3 is used as a reset button, leaving 4 LEDs (LD0-3), 2 RGB LEDs (LD4-5), 2 slide switches (SW0-1), 4 GPIOs (PMODA) and 3 push buttons (BTN 0-2) for user applications. UART connection to the host PC is possible with the on-board FTDI chip with minimal modification to the board as described in the README.
One question. Because the board has a 125 MHz clock source rather than the Arty board's 100 MHz, a new clock generator module is given in
rtl/fpga/clkgen_pynqz2.sv
based onvendor/lowrisc_ibex/shared/rtl/fpga/xilinx/clkgen_xil7series.sv
. Is it acceptable to placeclkgen_pynqz2.sv
in thertl/fpga
directory?