Add support for the missing SIMD levels from the 53rd Intel ISA Ext. Guide: AMX-FP16, AMX-COMPLEX, AVX-VNNI, AVX-VNNI-INT16 #88
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-- Similar to GATHER instructions, AMX-INT8 and AMX-BF16 instructions cannot have the same operand more than once Intel SDM 325462-084US, p. 585 Checked with XED version: [v2024.04.01]
-- According to Intel® Architecture Instruction Set Extensions and Future Features 319433-053, p. 158 Checked with XED version: [v2024.04.01]
-- According to Intel® Architecture Instruction Set Extensions and Future Features 319433-053, p. 155 Checked with XED version: [v2024.04.01]
- According to Intel® Architecture Instruction Set Extensions and Future Features 319433-053, p. 112-118: -- VBCSTNEBF16PS -> VBCSTNEBF162PS -- VCVTNEPS2BF16 target always xmm -- no AVX512 EVEX version, so no LATEVEX -- avx-ne-convert.asm, avx-ne-convert-64.asm test files Checked with XED version: [v2024.04.01]
- According to Intel® Architecture Instruction Set Extensions and Future Features 319433-053, p. 120: -- no AVX512 EVEX version, so no LATEVEX -- avx-vnni-int8.asm, avx-vnni-int8-64.asm test files -- unsized operands allowed Checked with XED version: [v2024.04.01]
- According to Intel SDM 325462-084US, p. 2413-2419 -- VEX encoded version of the AVX512_VNNI xmm, ymm instructions -- there is AVX512 EVEX version, so latevex flag required -- avx-vnni.asm, avx-vnni-64.asm test files -- unsized operands allowed Checked with XED version: [v2024.04.01]
- According to Intel® Architecture Instruction Set Extensions and Future Features 319433-053, p. 126-127: -- there is AVX512 EVEX version, so latevex flag required -- avx-ifma.asm, avx-ifma-64.asm test files -- unsized operands allowed Checked with XED version: [v2024.04.01]
6, AVX-VNNI-INT16 support - According to Intel® Architecture Instruction Set Extensions and Future Features 319433-053, p. 123-124: -- no AVX512 EVEX version, so LATEVEX not required -- avx-vnni-int16.asm, avx-vnni-int16-64.asm test files -- unsized operands allowed Checked with XED version: [v2024.04.01]
-- According to Intel SDM 325462-084US, p. 1989, VCVTNEPS2BF16 has EVEX form too, so LATEVEX required -- only for VCVTNEPS2BF16 required explicit size-operator -- LATEVEX for VCVTNEPS2BF16 in avx-ne-convert.asm, avx-ne-convert-64.asm test files Checked with XED version: [v2024.04.01]
-- finished according to Intel SDM 325462-084US -- avx512bf16.asm, avx512bf16-64.asm test files Checked with XED version: [v2024.04.01]
-- finished according to Intel SDM 325462-084US -- avx512vp2intersect.asm, avx512vp2intersect-64.asm test files Checked with XED version: [v2024.04.01]
-- VF[N]M[ADD|SUB][132|213|213][S|P]H
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AMX-FP16 support, according to Intel® Architecture Instruction Set Extensions and Future Features 319433-053, p. 158
AMX-COMPLEX support, according to Intel® Architecture Instruction Set Extensions and Future Features 319433-053, p. 155
AVX-VNNI support, according to Intel SDM 325462-084US, p. 2413-2419
AVX-VNNI-INT16 support, according to Intel® Architecture Instruction Set Extensions and Future Features 319433-053, p. 123-124:
New test files:
fix: AMX sample
fix: AVX-NE-CONVERT instructions
fix: AVX-VNNI-8 instructions
fix: AVX-IFMA unsized operands
fix: AVX512_BF16 support
fix: AVX512_VP2INTERSECT support
fix: AVX512_FP16 FMA mnemonics
Checked with XED version: [v2024.04.01]
part of the Intel Software Development Emulator 9.38.0
https://www.intel.com/content/www/us/en/developer/articles/tool/software-development-emulator.html