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| 1 | +/* |
| 2 | + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio |
| 3 | +
|
| 4 | + Licensed under the Apache License, Version 2.0 (the "License"); |
| 5 | + you may not use this file except in compliance with the License. |
| 6 | + You may obtain a copy of the License at |
| 7 | +
|
| 8 | + http://www.apache.org/licenses/LICENSE-2.0 |
| 9 | +
|
| 10 | + Unless required by applicable law or agreed to in writing, software |
| 11 | + distributed under the License is distributed on an "AS IS" BASIS, |
| 12 | + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 13 | + See the License for the specific language governing permissions and |
| 14 | + limitations under the License. |
| 15 | +*/ |
| 16 | + |
| 17 | +/* |
| 18 | + * This file has been automatically generated using ChibiStudio board |
| 19 | + * generator plugin. Do not edit manually. |
| 20 | + */ |
| 21 | + |
| 22 | +#include "hal.h" |
| 23 | +#include "stm32_gpio.h" |
| 24 | + |
| 25 | +/*===========================================================================*/ |
| 26 | +/* Driver local definitions. */ |
| 27 | +/*===========================================================================*/ |
| 28 | + |
| 29 | +/*===========================================================================*/ |
| 30 | +/* Driver exported variables. */ |
| 31 | +/*===========================================================================*/ |
| 32 | + |
| 33 | +/*===========================================================================*/ |
| 34 | +/* Driver local variables and types. */ |
| 35 | +/*===========================================================================*/ |
| 36 | + |
| 37 | +/** |
| 38 | + * @brief Type of STM32 GPIO port setup. |
| 39 | + */ |
| 40 | +typedef struct { |
| 41 | + uint32_t moder; |
| 42 | + uint32_t otyper; |
| 43 | + uint32_t ospeedr; |
| 44 | + uint32_t pupdr; |
| 45 | + uint32_t odr; |
| 46 | + uint32_t afrl; |
| 47 | + uint32_t afrh; |
| 48 | +} gpio_setup_t; |
| 49 | + |
| 50 | +/** |
| 51 | + * @brief Type of STM32 GPIO initialization data. |
| 52 | + */ |
| 53 | +typedef struct { |
| 54 | +#if STM32_HAS_GPIOA || defined(__DOXYGEN__) |
| 55 | + gpio_setup_t PAData; |
| 56 | +#endif |
| 57 | +#if STM32_HAS_GPIOB || defined(__DOXYGEN__) |
| 58 | + gpio_setup_t PBData; |
| 59 | +#endif |
| 60 | +#if STM32_HAS_GPIOC || defined(__DOXYGEN__) |
| 61 | + gpio_setup_t PCData; |
| 62 | +#endif |
| 63 | +#if STM32_HAS_GPIOD || defined(__DOXYGEN__) |
| 64 | + gpio_setup_t PDData; |
| 65 | +#endif |
| 66 | +#if STM32_HAS_GPIOE || defined(__DOXYGEN__) |
| 67 | + gpio_setup_t PEData; |
| 68 | +#endif |
| 69 | +#if STM32_HAS_GPIOF || defined(__DOXYGEN__) |
| 70 | + gpio_setup_t PFData; |
| 71 | +#endif |
| 72 | +#if STM32_HAS_GPIOG || defined(__DOXYGEN__) |
| 73 | + gpio_setup_t PGData; |
| 74 | +#endif |
| 75 | +#if STM32_HAS_GPIOH || defined(__DOXYGEN__) |
| 76 | + gpio_setup_t PHData; |
| 77 | +#endif |
| 78 | +#if STM32_HAS_GPIOI || defined(__DOXYGEN__) |
| 79 | + gpio_setup_t PIData; |
| 80 | +#endif |
| 81 | +#if STM32_HAS_GPIOJ || defined(__DOXYGEN__) |
| 82 | + gpio_setup_t PJData; |
| 83 | +#endif |
| 84 | +#if STM32_HAS_GPIOK || defined(__DOXYGEN__) |
| 85 | + gpio_setup_t PKData; |
| 86 | +#endif |
| 87 | +} gpio_config_t; |
| 88 | + |
| 89 | +/** |
| 90 | + * @brief STM32 GPIO static initialization data. |
| 91 | + */ |
| 92 | +static const gpio_config_t gpio_default_config = { |
| 93 | +#if STM32_HAS_GPIOA |
| 94 | + {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, |
| 95 | + VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, |
| 96 | +#endif |
| 97 | +#if STM32_HAS_GPIOB |
| 98 | + {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, |
| 99 | + VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, |
| 100 | +#endif |
| 101 | +#if STM32_HAS_GPIOC |
| 102 | + {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, |
| 103 | + VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, |
| 104 | +#endif |
| 105 | +#if STM32_HAS_GPIOD |
| 106 | + {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, |
| 107 | + VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, |
| 108 | +#endif |
| 109 | +#if STM32_HAS_GPIOE |
| 110 | + {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, |
| 111 | + VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, |
| 112 | +#endif |
| 113 | +#if STM32_HAS_GPIOF |
| 114 | + {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, |
| 115 | + VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, |
| 116 | +#endif |
| 117 | +#if STM32_HAS_GPIOG |
| 118 | + {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, |
| 119 | + VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, |
| 120 | +#endif |
| 121 | +#if STM32_HAS_GPIOH |
| 122 | + {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, |
| 123 | + VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, |
| 124 | +#endif |
| 125 | +#if STM32_HAS_GPIOI |
| 126 | + {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, |
| 127 | + VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}, |
| 128 | +#endif |
| 129 | +#if STM32_HAS_GPIOJ |
| 130 | + {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, |
| 131 | + VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH}, |
| 132 | +#endif |
| 133 | +#if STM32_HAS_GPIOK |
| 134 | + {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, |
| 135 | + VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH} |
| 136 | +#endif |
| 137 | +}; |
| 138 | + |
| 139 | +/*===========================================================================*/ |
| 140 | +/* Driver local functions. */ |
| 141 | +/*===========================================================================*/ |
| 142 | + |
| 143 | +static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { |
| 144 | + |
| 145 | + gpiop->OTYPER = config->otyper; |
| 146 | + gpiop->OSPEEDR = config->ospeedr; |
| 147 | + gpiop->PUPDR = config->pupdr; |
| 148 | + gpiop->ODR = config->odr; |
| 149 | + gpiop->AFRL = config->afrl; |
| 150 | + gpiop->AFRH = config->afrh; |
| 151 | + gpiop->MODER = config->moder; |
| 152 | +} |
| 153 | + |
| 154 | +static void stm32_gpio_init(void) { |
| 155 | + |
| 156 | + /* Enabling GPIO-related clocks, the mask comes from the |
| 157 | + registry header file.*/ |
| 158 | + rccResetAHB(STM32_GPIO_EN_MASK); |
| 159 | + rccEnableAHB(STM32_GPIO_EN_MASK, true); |
| 160 | + |
| 161 | + /* Initializing all the defined GPIO ports.*/ |
| 162 | +#if STM32_HAS_GPIOA |
| 163 | + gpio_init(GPIOA, &gpio_default_config.PAData); |
| 164 | +#endif |
| 165 | +#if STM32_HAS_GPIOB |
| 166 | + gpio_init(GPIOB, &gpio_default_config.PBData); |
| 167 | +#endif |
| 168 | +#if STM32_HAS_GPIOC |
| 169 | + gpio_init(GPIOC, &gpio_default_config.PCData); |
| 170 | +#endif |
| 171 | +#if STM32_HAS_GPIOD |
| 172 | + gpio_init(GPIOD, &gpio_default_config.PDData); |
| 173 | +#endif |
| 174 | +#if STM32_HAS_GPIOE |
| 175 | + gpio_init(GPIOE, &gpio_default_config.PEData); |
| 176 | +#endif |
| 177 | +#if STM32_HAS_GPIOF |
| 178 | + gpio_init(GPIOF, &gpio_default_config.PFData); |
| 179 | +#endif |
| 180 | +#if STM32_HAS_GPIOG |
| 181 | + gpio_init(GPIOG, &gpio_default_config.PGData); |
| 182 | +#endif |
| 183 | +#if STM32_HAS_GPIOH |
| 184 | + gpio_init(GPIOH, &gpio_default_config.PHData); |
| 185 | +#endif |
| 186 | +#if STM32_HAS_GPIOI |
| 187 | + gpio_init(GPIOI, &gpio_default_config.PIData); |
| 188 | +#endif |
| 189 | +#if STM32_HAS_GPIOJ |
| 190 | + gpio_init(GPIOJ, &gpio_default_config.PJData); |
| 191 | +#endif |
| 192 | +#if STM32_HAS_GPIOK |
| 193 | + gpio_init(GPIOK, &gpio_default_config.PKData); |
| 194 | +#endif |
| 195 | +} |
| 196 | + |
| 197 | +/*===========================================================================*/ |
| 198 | +/* Driver interrupt handlers. */ |
| 199 | +/*===========================================================================*/ |
| 200 | + |
| 201 | +/*===========================================================================*/ |
| 202 | +/* Driver exported functions. */ |
| 203 | +/*===========================================================================*/ |
| 204 | + |
| 205 | +/** |
| 206 | + * @brief Early initialization code. |
| 207 | + * @details GPIO ports and system clocks are initialized before everything |
| 208 | + * else. |
| 209 | + */ |
| 210 | +void __early_init(void) { |
| 211 | + |
| 212 | + stm32_gpio_init(); |
| 213 | + stm32_clock_init(); |
| 214 | + rccEnableCRC(true); |
| 215 | +} |
| 216 | + |
| 217 | +#if HAL_USE_SDC || defined(__DOXYGEN__) |
| 218 | +/** |
| 219 | + * @brief SDC card detection. |
| 220 | + */ |
| 221 | +bool sdc_lld_is_card_inserted(SDCDriver *sdcp) { |
| 222 | + |
| 223 | + (void)sdcp; |
| 224 | + /* TODO: Fill the implementation.*/ |
| 225 | + return true; |
| 226 | +} |
| 227 | + |
| 228 | +/** |
| 229 | + * @brief SDC card write protection detection. |
| 230 | + */ |
| 231 | +bool sdc_lld_is_write_protected(SDCDriver *sdcp) { |
| 232 | + |
| 233 | + (void)sdcp; |
| 234 | + /* TODO: Fill the implementation.*/ |
| 235 | + return false; |
| 236 | +} |
| 237 | +#endif /* HAL_USE_SDC */ |
| 238 | + |
| 239 | +#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) |
| 240 | +/** |
| 241 | + * @brief MMC_SPI card detection. |
| 242 | + */ |
| 243 | +bool mmc_lld_is_card_inserted(MMCDriver *mmcp) { |
| 244 | + |
| 245 | + (void)mmcp; |
| 246 | + /* TODO: Fill the implementation.*/ |
| 247 | + return true; |
| 248 | +} |
| 249 | + |
| 250 | +/** |
| 251 | + * @brief MMC_SPI card write protection detection. |
| 252 | + */ |
| 253 | +bool mmc_lld_is_write_protected(MMCDriver *mmcp) { |
| 254 | + |
| 255 | + (void)mmcp; |
| 256 | + /* TODO: Fill the implementation.*/ |
| 257 | + return false; |
| 258 | +} |
| 259 | +#endif |
| 260 | + |
| 261 | +/** |
| 262 | + * @brief Board-specific initialization code. |
| 263 | + * @todo Add your board-specific code, if any. |
| 264 | + */ |
| 265 | +void boardInit(void) { |
| 266 | + |
| 267 | +} |
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