Loongarch support

CMakeLists.txt

@@ -95,7 +95,7 @@ IF(NOT CMAKE_SYSTEM_PROCESSOR)
       "cpuinfo will compile, but cpuinfo_initialize() will always fail.")
     SET(CPUINFO_SUPPORTED_PLATFORM FALSE)
   ENDIF()
-ELSEIF(NOT CPUINFO_TARGET_PROCESSOR MATCHES "^(i[3-6]86|AMD64|x86(_64)?|armv[5-8].*|aarch64|arm64.*|ARM64.*|riscv(32|64))$")
+ELSEIF(NOT CPUINFO_TARGET_PROCESSOR MATCHES "^(i[3-6]86|AMD64|x86(_64)?|armv[5-8].*|aarch64|arm64.*|ARM64.*|riscv(32|64)|loongarch64)$")
   MESSAGE(WARNING
     "Target processor architecture \"${CPUINFO_TARGET_PROCESSOR}\" is not supported in cpuinfo. "
     "cpuinfo will compile, but cpuinfo_initialize() will always fail.")
@@ -224,6 +224,16 @@ IF(CPUINFO_SUPPORTED_PLATFORM)
 	src/riscv/linux/riscv-hw.c
 	src/riscv/linux/riscv-isa.c)
     ENDIF()
+  ELSEIF(CPUINFO_TARGET_PROCESSOR MATCHES "^(loongarch64)$")
+    LIST(APPEND CPUINFO_SRCS
+      src/loongarch/uarch.c)
+    IF(CMAKE_SYSTEM_NAME STREQUAL "Linux")
+      LIST(APPEND CPUINFO_SRCS
+        src/loongarch/linux/init.c
+        src/loongarch/linux/cpuinfo.c
+        src/loongarch/linux/cache.c
+        src/loongarch/linux/loongarch64-isa.c)
+    ENDIF()
   ENDIF()
 
   IF(CMAKE_SYSTEM_NAME STREQUAL "Emscripten")

configure.py

@@ -63,6 +63,16 @@ def main(args):
                     "riscv/linux/riscv-isa.c",
                 ]
 
+        if build.target.is_loongarch64:
+            sources += ["loongarch/uarch.c"]
+            if build.target.is_linux:
+                sources += [
+                    "loongarch/linux/init.c",
+                    "loongarch/linux/cpuinfo.c",
+                    "loongarch/linux/cache.c",
+                    "loongarch/linux/loongarch64-isa.c",
+                ]
+
         if build.target.is_macos:
             sources += ["mach/topology.c"]
         if build.target.is_linux or build.target.is_android:

include/cpuinfo.h

@@ -54,6 +54,10 @@
 #endif
 #endif
 
+#if defined(__loongarch64)
+#define CPUINFO_ARCH_LOONGARCH64 1
+#endif
+
 /* Define other architecture-specific macros as 0 */
 
 #ifndef CPUINFO_ARCH_X86
@@ -96,6 +100,10 @@
 #define CPUINFO_ARCH_RISCV64 0
 #endif
 
+#ifndef CPUINFO_ARCH_LOONGARCH64
+#define CPUINFO_ARCH_LOONGARCH64 0
+#endif
+
 #if CPUINFO_ARCH_X86 && defined(_MSC_VER)
 #define CPUINFO_ABI __cdecl
 #elif CPUINFO_ARCH_X86 && defined(__GNUC__)
@@ -304,6 +312,10 @@ enum cpuinfo_vendor {
 	 * in 1997.
 	 */
 	cpuinfo_vendor_dec = 57,
+	/**
+	 * Loongson. Vendor of LOONGARCH processor microarchitecture.
+	 */
+	cpuinfo_vendor_loongson = 58,
 };
 
 /**
@@ -601,6 +613,15 @@ enum cpuinfo_uarch {
 
 	/** HiSilicon TaiShan v110 (Huawei Kunpeng 920 series processors). */
 	cpuinfo_uarch_taishan_v110 = 0x00C00100,
+
+	/** Loongson 64bit, 2-issue. */
+	cpuinfo_uarch_LA264 = 0x00D00100,
+	/** Loongson 64bit, 3-issue. */
+	cpuinfo_uarch_LA364 = 0x00D00101,
+	/** Loongson 64bit, 4-issue. */
+	cpuinfo_uarch_LA464 = 0x00D00102,
+	/** Loongson 64bit, 6-issue. */
+	cpuinfo_uarch_LA664 = 0x00D00103,
 };
 
 struct cpuinfo_processor {
@@ -671,6 +692,9 @@ struct cpuinfo_core {
 #elif CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
 	/** Value of Main ID Register (MIDR) for this core */
 	uint32_t midr;
+#elif CPUINFO_ARCH_LOONGARCH64
+	/** Value of PRocessorID (PRID) for this core */
+	uint32_t prid;
 #endif
 	/** Clock rate (non-Turbo) of the core, in Hz */
 	uint64_t frequency;
@@ -699,6 +723,9 @@ struct cpuinfo_cluster {
 #elif CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
 	/** Value of Main ID Register (MIDR) of the cores in the cluster */
 	uint32_t midr;
+#elif CPUINFO_ARCH_LOONGARCH64
+	/** Value of PRID for this cores in the cluster */
+	uint32_t prid;
 #endif
 	/** Clock rate (non-Turbo) of the cores in the cluster, in Hz */
 	uint64_t frequency;
@@ -732,6 +759,9 @@ struct cpuinfo_uarch_info {
 #elif CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
 	/** Value of Main ID Register (MIDR) for the microarchitecture */
 	uint32_t midr;
+#elif CPUINFO_ARCH_LOONGARCH64
+	/** Value of PRID for the microarchitecture */
+	uint32_t prid;
 #endif
 	/** Number of logical processors with the microarchitecture */
 	uint32_t processor_count;
@@ -2227,6 +2257,150 @@ static inline bool cpuinfo_has_riscv_v(void) {
 #endif
 }
 
+#if CPUINFO_ARCH_LOONGARCH64
+/* This structure is not a part of stable API. Use cpuinfo_has_loongarch_* functions instead. */
+struct cpuinfo_loongarch_isa {
+	bool cpucfg;
+	bool lam;
+	bool ual;
+	bool fpu;
+	bool lsx;
+	bool lasx;
+
+	bool crc32;
+	bool complex;
+	bool crypto;
+	bool lvz;
+	bool lbt_x86;
+	bool lbt_arm;
+	bool lbt_mips;
+	bool ptw;
+	bool lspw;
+};
+
+extern struct cpuinfo_loongarch_isa cpuinfo_isa;
+#endif
+
+static inline bool cpuinfo_has_loongarch_cpucfg(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.cpucfg;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_lam(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.lam;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_ual(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.ual;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_fpu(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+		return cpuinfo_isa.fpu;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_lsx(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+		return cpuinfo_isa.lsx;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_lasx(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+		return cpuinfo_isa.lasx;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_crc32(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.crc32;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_complex(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.complex;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_crypto(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.crypto;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_lvz(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.lvz;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_lbt_x86(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.lbt_x86;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_lbt_arm(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.lbt_arm;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_lbt_mips(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.lbt_mips;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_ptw(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.ptw;
+#else
+	return false;
+#endif
+}
+
+static inline bool cpuinfo_has_loongarch_lspw(void) {
+#if CPUINFO_ARCH_LOONGARCH64
+	return cpuinfo_isa.lspw;
+#else
+	return false;
+#endif
+}
+
 const struct cpuinfo_processor* CPUINFO_ABI cpuinfo_get_processors(void);
 const struct cpuinfo_core* CPUINFO_ABI cpuinfo_get_cores(void);
 const struct cpuinfo_cluster* CPUINFO_ABI cpuinfo_get_clusters(void);

src/api.c

@@ -30,7 +30,7 @@ uint32_t cpuinfo_packages_count = 0;
 uint32_t cpuinfo_cache_count[cpuinfo_cache_level_max] = {0};
 uint32_t cpuinfo_max_cache_size = 0;
 
-#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64
+#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64 || CPUINFO_ARCH_LOONGARCH64
 struct cpuinfo_uarch_info* cpuinfo_uarchs = NULL;
 uint32_t cpuinfo_uarchs_count = 0;
 #else
@@ -41,7 +41,7 @@ struct cpuinfo_uarch_info cpuinfo_global_uarch = {cpuinfo_uarch_unknown};
 uint32_t cpuinfo_linux_cpu_max = 0;
 const struct cpuinfo_processor** cpuinfo_linux_cpu_to_processor_map = NULL;
 const struct cpuinfo_core** cpuinfo_linux_cpu_to_core_map = NULL;
-#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64
+#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64 || CPUINFO_ARCH_LOONGARCH64
 const uint32_t* cpuinfo_linux_cpu_to_uarch_index_map = NULL;
 #endif
 #endif
@@ -78,7 +78,7 @@ const struct cpuinfo_uarch_info* cpuinfo_get_uarchs() {
 	if (!cpuinfo_is_initialized) {
 		cpuinfo_log_fatal("cpuinfo_get_%s called before cpuinfo is initialized", "uarchs");
 	}
-#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64
+#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64 || CPUINFO_ARCH_LOONGARCH64
 	return cpuinfo_uarchs;
 #else
 	return &cpuinfo_global_uarch;
@@ -129,7 +129,7 @@ const struct cpuinfo_uarch_info* cpuinfo_get_uarch(uint32_t index) {
 	if (!cpuinfo_is_initialized) {
 		cpuinfo_log_fatal("cpuinfo_get_%s called before cpuinfo is initialized", "uarch");
 	}
-#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64
+#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64 || CPUINFO_ARCH_LOONGARCH64
 	if CPUINFO_UNLIKELY (index >= cpuinfo_uarchs_count) {
 		return NULL;
 	}
@@ -174,7 +174,7 @@ uint32_t cpuinfo_get_uarchs_count(void) {
 	if (!cpuinfo_is_initialized) {
 		cpuinfo_log_fatal("cpuinfo_get_%s called before cpuinfo is initialized", "uarchs_count");
 	}
-#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64
+#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64 || CPUINFO_ARCH_LOONGARCH64
 	return cpuinfo_uarchs_count;
 #else
 	return 1;

src/cpuinfo/internal-api.h

@@ -34,7 +34,7 @@ extern CPUINFO_INTERNAL uint32_t cpuinfo_packages_count;
 extern CPUINFO_INTERNAL uint32_t cpuinfo_cache_count[cpuinfo_cache_level_max];
 extern CPUINFO_INTERNAL uint32_t cpuinfo_max_cache_size;
 
-#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64
+#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_RISCV32 || CPUINFO_ARCH_RISCV64 || CPUINFO_ARCH_LOONGARCH64
 extern CPUINFO_INTERNAL struct cpuinfo_uarch_info* cpuinfo_uarchs;
 extern CPUINFO_INTERNAL uint32_t cpuinfo_uarchs_count;
 #else
@@ -61,6 +61,7 @@ CPUINFO_PRIVATE void cpuinfo_arm_mach_init(void);
 CPUINFO_PRIVATE void cpuinfo_arm_linux_init(void);
 CPUINFO_PRIVATE void cpuinfo_riscv_linux_init(void);
 CPUINFO_PRIVATE void cpuinfo_emscripten_init(void);
+CPUINFO_PRIVATE void cpuinfo_loongarch_linux_init(void);
 
 CPUINFO_PRIVATE uint32_t cpuinfo_compute_max_cache_size(const struct cpuinfo_processor* processor);
 

src/init.c

@@ -58,6 +58,12 @@ bool CPUINFO_ABI cpuinfo_initialize(void) {
 	}
 	init_guard = true;
 #endif
+#elif CPUINFO_ARCH_LOONGARCH64
+#if defined(__linux__)
+	pthread_once(&init_guard, &cpuinfo_loongarch_linux_init);
+#else
+	cpuinfo_log_error("loongarch operating system is not supported in cpuinfo");
+#endif
 #else
 	cpuinfo_log_error("processor architecture is not supported in cpuinfo");
 #endif

src/linux/processors.c

@@ -293,7 +293,7 @@ uint32_t cpuinfo_linux_get_max_possible_processor(uint32_t max_processors_count)
 	uint32_t max_possible_processor = 0;
 	if (!cpuinfo_linux_parse_cpulist(
 		    POSSIBLE_CPULIST_FILENAME, max_processor_number_parser, &max_possible_processor)) {
-#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
+#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_LOONGARCH64
 		cpuinfo_log_error("failed to parse the list of possible processors in %s", POSSIBLE_CPULIST_FILENAME);
 #else
 		cpuinfo_log_warning("failed to parse the list of possible processors in %s", POSSIBLE_CPULIST_FILENAME);
@@ -315,7 +315,7 @@ uint32_t cpuinfo_linux_get_max_present_processor(uint32_t max_processors_count)
 	uint32_t max_present_processor = 0;
 	if (!cpuinfo_linux_parse_cpulist(
 		    PRESENT_CPULIST_FILENAME, max_processor_number_parser, &max_present_processor)) {
-#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64
+#if CPUINFO_ARCH_ARM || CPUINFO_ARCH_ARM64 || CPUINFO_ARCH_LOONGARCH64
 		cpuinfo_log_error("failed to parse the list of present processors in %s", PRESENT_CPULIST_FILENAME);
 #else
 		cpuinfo_log_warning("failed to parse the list of present processors in %s", PRESENT_CPULIST_FILENAME);

src/loongarch/api.h

@@ -0,0 +1,12 @@
+#pragma once
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include <cpuinfo.h>
+#include <cpuinfo/common.h>
+
+CPUINFO_INTERNAL void cpuinfo_loongarch_decode_vendor_uarch(
+	uint32_t prid,
+	enum cpuinfo_vendor vendor[restrict static 1],
+	enum cpuinfo_uarch uarch[restrict static 1]);